Search

Hiep T. Nguyen

Examiner (ID: 17279, Phone: (571)272-4197 , Office: P/2131 )

Most Active Art Unit
2187
Art Unit(s)
2759, 2188, 2138, 2751, 2131, 2137, 2187, 2312
Total Applications
2199
Issued Applications
1997
Pending Applications
68
Abandoned Applications
150

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18918293 [patent_doc_number] => 11880573 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-23 [patent_title] => Disk array device, disk array control device, and disk array control method [patent_app_type] => utility [patent_app_number] => 17/312098 [patent_app_country] => US [patent_app_date] => 2019-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 6697 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17312098 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/312098
Disk array device, disk array control device, and disk array control method Dec 17, 2019 Issued
Array ( [id] => 17107254 [patent_doc_number] => 11127479 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-21 [patent_title] => Memory system quality margin analysis and configuration [patent_app_type] => utility [patent_app_number] => 16/708206 [patent_app_country] => US [patent_app_date] => 2019-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8714 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16708206 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/708206
Memory system quality margin analysis and configuration Dec 8, 2019 Issued
Array ( [id] => 15654181 [patent_doc_number] => 20200089621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => METHOD, SYSTEM, AND APPARATUS FOR STRESS TESTING MEMORY TRANSLATION TABLES [patent_app_type] => utility [patent_app_number] => 16/693676 [patent_app_country] => US [patent_app_date] => 2019-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8567 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16693676 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/693676
Method, system, and apparatus for stress testing memory translation tables Nov 24, 2019 Issued
Array ( [id] => 16833848 [patent_doc_number] => 11010099 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-18 [patent_title] => Data storage device executing access commands based on leapfrog sort [patent_app_type] => utility [patent_app_number] => 16/688853 [patent_app_country] => US [patent_app_date] => 2019-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 61 [patent_no_of_words] => 5906 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16688853 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/688853
Data storage device executing access commands based on leapfrog sort Nov 18, 2019 Issued
Array ( [id] => 17016916 [patent_doc_number] => 11086555 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-08-10 [patent_title] => Synchronously replicating datasets [patent_app_type] => utility [patent_app_number] => 16/661724 [patent_app_country] => US [patent_app_date] => 2019-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 58 [patent_figures_cnt] => 59 [patent_no_of_words] => 115856 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16661724 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/661724
Synchronously replicating datasets Oct 22, 2019 Issued
Array ( [id] => 15458763 [patent_doc_number] => 20200042206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-06 [patent_title] => COPY SOURCE TO TARGET MANAGEMENT IN A DATA STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 16/600397 [patent_app_country] => US [patent_app_date] => 2019-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16000 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16600397 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/600397
Copy source to target management in a data storage system Oct 10, 2019 Issued
Array ( [id] => 17325374 [patent_doc_number] => 11216386 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-04 [patent_title] => Techniques for setting a 2-level auto-close timer to access a memory device [patent_app_type] => utility [patent_app_number] => 16/584612 [patent_app_country] => US [patent_app_date] => 2019-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12169 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16584612 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/584612
Techniques for setting a 2-level auto-close timer to access a memory device Sep 25, 2019 Issued
Array ( [id] => 16192963 [patent_doc_number] => 20200233812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-23 [patent_title] => STORAGE DEVICE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/584482 [patent_app_country] => US [patent_app_date] => 2019-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14643 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16584482 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/584482
Storage device and method of operating the same Sep 25, 2019 Issued
Array ( [id] => 16722318 [patent_doc_number] => 20210089465 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => ADDRESSING CACHE SLICES IN A LAST LEVEL CACHE [patent_app_type] => utility [patent_app_number] => 16/583012 [patent_app_country] => US [patent_app_date] => 2019-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13426 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16583012 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/583012
Addressing cache slices in a last level cache Sep 24, 2019 Issued
Array ( [id] => 17492093 [patent_doc_number] => 11281396 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-22 [patent_title] => Storage system with a partial replica [patent_app_type] => utility [patent_app_number] => 16/579484 [patent_app_country] => US [patent_app_date] => 2019-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 11431 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16579484 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/579484
Storage system with a partial replica Sep 22, 2019 Issued
Array ( [id] => 16713965 [patent_doc_number] => 20210081112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => SNAPSHOT COMPLIANCE TECHNIQUES [patent_app_type] => utility [patent_app_number] => 16/568636 [patent_app_country] => US [patent_app_date] => 2019-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12242 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16568636 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/568636
Snapshot compliance techniques Sep 11, 2019 Issued
Array ( [id] => 17269089 [patent_doc_number] => 11194514 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-07 [patent_title] => Just in time data placement in NAND flash [patent_app_type] => utility [patent_app_number] => 16/568671 [patent_app_country] => US [patent_app_date] => 2019-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4005 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16568671 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/568671
Just in time data placement in NAND flash Sep 11, 2019 Issued
Array ( [id] => 16942980 [patent_doc_number] => 11055222 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => Prefetching of completion notifications and context [patent_app_type] => utility [patent_app_number] => 16/565510 [patent_app_country] => US [patent_app_date] => 2019-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4883 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16565510 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/565510
Prefetching of completion notifications and context Sep 9, 2019 Issued
Array ( [id] => 17076582 [patent_doc_number] => 11112980 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-07 [patent_title] => Method and apparatus for allocating memory space for driving neural network [patent_app_type] => utility [patent_app_number] => 16/561303 [patent_app_country] => US [patent_app_date] => 2019-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 11430 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16561303 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/561303
Method and apparatus for allocating memory space for driving neural network Sep 4, 2019 Issued
Array ( [id] => 17076575 [patent_doc_number] => 11112973 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-07 [patent_title] => Computer system and data management method [patent_app_type] => utility [patent_app_number] => 16/558460 [patent_app_country] => US [patent_app_date] => 2019-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 30 [patent_no_of_words] => 16288 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16558460 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/558460
Computer system and data management method Sep 2, 2019 Issued
Array ( [id] => 17031361 [patent_doc_number] => 11093172 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-17 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 16/556043 [patent_app_country] => US [patent_app_date] => 2019-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 13942 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 303 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16556043 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/556043
Semiconductor memory device Aug 28, 2019 Issued
Array ( [id] => 16527443 [patent_doc_number] => 20200401523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => PREFETCHING IN A LOWER LEVEL EXCLUSIVE CACHE HIERARCHY [patent_app_type] => utility [patent_app_number] => 16/543503 [patent_app_country] => US [patent_app_date] => 2019-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7588 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16543503 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/543503
Prefetching in a lower level exclusive cache hierarchy Aug 15, 2019 Issued
Array ( [id] => 16942758 [patent_doc_number] => 11054997 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => Artificial neural networks in memory [patent_app_type] => utility [patent_app_number] => 16/538146 [patent_app_country] => US [patent_app_date] => 2019-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5486 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16538146 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/538146
Artificial neural networks in memory Aug 11, 2019 Issued
Array ( [id] => 16745221 [patent_doc_number] => 10970211 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-06 [patent_title] => Techniques for reducing size of log records [patent_app_type] => utility [patent_app_number] => 16/530237 [patent_app_country] => US [patent_app_date] => 2019-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 19497 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16530237 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/530237
Techniques for reducing size of log records Aug 1, 2019 Issued
Array ( [id] => 16972424 [patent_doc_number] => 11068396 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-20 [patent_title] => System and method for balance localization and priority of pages to flush in a sequential log [patent_app_type] => utility [patent_app_number] => 16/528836 [patent_app_country] => US [patent_app_date] => 2019-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8567 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16528836 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/528836
System and method for balance localization and priority of pages to flush in a sequential log Jul 31, 2019 Issued
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