
Hiep T. Nguyen
Examiner (ID: 18287, Phone: (571)272-4197 , Office: P/2131 )
| Most Active Art Unit | 2187 |
| Art Unit(s) | 2187, 2131, 2759, 2751, 2137, 2188, 2312, 2138 |
| Total Applications | 2185 |
| Issued Applications | 1977 |
| Pending Applications | 88 |
| Abandoned Applications | 149 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 13782333
[patent_doc_number] => 20190004705
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-01-03
[patent_title] => METHOD FOR CONFIGURING DISK ARRAY OF ELECTRONIC DEVICE AND RELATED ELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/025460
[patent_app_country] => US
[patent_app_date] => 2018-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5379
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 42
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16025460
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/025460 | Method for configuring disk array of electronic device and related electronic device | Jul 1, 2018 | Issued |
Array
(
[id] => 16130111
[patent_doc_number] => 10698816
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-06-30
[patent_title] => Secure logical-to-physical caching
[patent_app_type] => utility
[patent_app_number] => 16/023485
[patent_app_country] => US
[patent_app_date] => 2018-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 13029
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16023485
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/023485 | Secure logical-to-physical caching | Jun 28, 2018 | Issued |
Array
(
[id] => 15328215
[patent_doc_number] => 20200004437
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-01-02
[patent_title] => DETERMINING WHEN TO PERFORM A DATA INTEGRITY CHECK OF COPIES OF A DATA SET USING A MACHINE LEARNING MODULE
[patent_app_type] => utility
[patent_app_number] => 16/023456
[patent_app_country] => US
[patent_app_date] => 2018-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10286
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16023456
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/023456 | Determining when to perform a data integrity check of copies of a data set using a machine learning module | Jun 28, 2018 | Issued |
Array
(
[id] => 15272205
[patent_doc_number] => 20190384837
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-12-19
[patent_title] => METHOD AND APPARATUS TO MANAGE FLUSH OF AN ATOMIC GROUP OF WRITES TO PERSISTENT MEMORY IN RESPONSE TO AN UNEXPECTED POWER LOSS
[patent_app_type] => utility
[patent_app_number] => 16/012515
[patent_app_country] => US
[patent_app_date] => 2018-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4921
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16012515
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/012515 | Method and apparatus to manage flush of an atomic group of writes to persistent memory in response to an unexpected power loss | Jun 18, 2018 | Issued |
Array
(
[id] => 13466951
[patent_doc_number] => 20180285018
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-10-04
[patent_title] => MEMORY HEALTH MONITORING
[patent_app_type] => utility
[patent_app_number] => 16/002391
[patent_app_country] => US
[patent_app_date] => 2018-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 18268
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16002391
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/002391 | Memory health monitoring | Jun 6, 2018 | Issued |
Array
(
[id] => 14689317
[patent_doc_number] => 20190243774
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-08-08
[patent_title] => MEMORY MANAGE METHOD AND STORAGE CONTROLLER USING THE SAME
[patent_app_type] => utility
[patent_app_number] => 15/993610
[patent_app_country] => US
[patent_app_date] => 2018-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6460
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15993610
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/993610 | Memory manage method and storage controller using the same | May 30, 2018 | Issued |
Array
(
[id] => 15518939
[patent_doc_number] => 10566063
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-02-18
[patent_title] => Memory system with dynamic calibration using a trim management mechanism
[patent_app_type] => utility
[patent_app_number] => 15/981810
[patent_app_country] => US
[patent_app_date] => 2018-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 9790
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15981810
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/981810 | Memory system with dynamic calibration using a trim management mechanism | May 15, 2018 | Issued |
Array
(
[id] => 15153913
[patent_doc_number] => 20190355434
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-11-21
[patent_title] => MEMORY SYSTEM QUALITY INTEGRAL ANALYSIS AND CONFIGURATION
[patent_app_type] => utility
[patent_app_number] => 15/981829
[patent_app_country] => US
[patent_app_date] => 2018-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9473
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15981829
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/981829 | Memory system quality integral analysis and configuration | May 15, 2018 | Issued |
Array
(
[id] => 14218781
[patent_doc_number] => 20190121775
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-04-25
[patent_title] => FRAME PROTOCOL OF MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 15/981703
[patent_app_country] => US
[patent_app_date] => 2018-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 22127
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15981703
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/981703 | Frame protocol of memory device | May 15, 2018 | Issued |
Array
(
[id] => 15153915
[patent_doc_number] => 20190355435
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-11-21
[patent_title] => MEMORY SYSTEM QUALITY MARGIN ANALYSIS AND CONFIGURATION
[patent_app_type] => utility
[patent_app_number] => 15/981835
[patent_app_country] => US
[patent_app_date] => 2018-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8651
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15981835
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/981835 | Memory system quality margin analysis and configuration | May 15, 2018 | Issued |
Array
(
[id] => 15151643
[patent_doc_number] => 20190354299
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-11-21
[patent_title] => MEMORY SYSTEM QUALITY THRESHOLD INTERSECTION ANALYSIS AND CONFIGURATION
[patent_app_type] => utility
[patent_app_number] => 15/981841
[patent_app_country] => US
[patent_app_date] => 2018-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8841
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15981841
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/981841 | Memory system quality threshold intersection analysis and configuration | May 15, 2018 | Issued |
Array
(
[id] => 16185914
[patent_doc_number] => 10719246
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-07-21
[patent_title] => Non-volatile memory storage for multi-channel memory system
[patent_app_type] => utility
[patent_app_number] => 15/976321
[patent_app_country] => US
[patent_app_date] => 2018-05-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 10276
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15976321
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/976321 | Non-volatile memory storage for multi-channel memory system | May 9, 2018 | Issued |
Array
(
[id] => 13376023
[patent_doc_number] => 20180239553
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-08-23
[patent_title] => METHOD FOR DEDUPLICATION IN STORAGE SYSTEM, STORAGE SYSTEM, AND CONTROLLER
[patent_app_type] => utility
[patent_app_number] => 15/960546
[patent_app_country] => US
[patent_app_date] => 2018-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10696
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 245
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15960546
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/960546 | Method for deduplication in storage system, storage system, and controller | Apr 22, 2018 | Issued |
Array
(
[id] => 13512045
[patent_doc_number] => 20180307565
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-10-25
[patent_title] => STORAGE CONTROL APPARATUS AND STORAGE CONTROL METHOD
[patent_app_type] => utility
[patent_app_number] => 15/955745
[patent_app_country] => US
[patent_app_date] => 2018-04-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13308
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15955745
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/955745 | Storage control apparatus and storage control method | Apr 17, 2018 | Issued |
Array
(
[id] => 14538837
[patent_doc_number] => 20190205040
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-07-04
[patent_title] => STORAGE DEVICES AND DATA RETENTION METHODS THEREOF
[patent_app_type] => utility
[patent_app_number] => 15/955917
[patent_app_country] => US
[patent_app_date] => 2018-04-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6108
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15955917
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/955917 | Storage devices and data retention methods thereof | Apr 17, 2018 | Issued |
Array
(
[id] => 15027327
[patent_doc_number] => 20190324668
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-24
[patent_title] => STORAGE SYSTEM WITH BINDING OF HOST NON-VOLATILE MEMORY TO ONE OR MORE STORAGE DEVICES
[patent_app_type] => utility
[patent_app_number] => 15/956309
[patent_app_country] => US
[patent_app_date] => 2018-04-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9073
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15956309
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/956309 | Storage system with binding of host non-volatile memory to one or more storage devices | Apr 17, 2018 | Issued |
Array
(
[id] => 15027815
[patent_doc_number] => 20190324912
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-24
[patent_title] => CACHE MEMORY SHARED BY SOFTWARE HAVING DIFFERENT TIME-SENSITIVITY CONSTRAINTS
[patent_app_type] => utility
[patent_app_number] => 15/956010
[patent_app_country] => US
[patent_app_date] => 2018-04-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4312
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15956010
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/956010 | CACHE MEMORY SHARED BY SOFTWARE HAVING DIFFERENT TIME-SENSITIVITY CONSTRAINTS | Apr 17, 2018 | Abandoned |
Array
(
[id] => 13511769
[patent_doc_number] => 20180307427
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-10-25
[patent_title] => STORAGE CONTROL APPARATUS AND STORAGE CONTROL METHOD
[patent_app_type] => utility
[patent_app_number] => 15/955866
[patent_app_country] => US
[patent_app_date] => 2018-04-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9289
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15955866
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/955866 | STORAGE CONTROL APPARATUS AND STORAGE CONTROL METHOD | Apr 17, 2018 | Abandoned |
Array
(
[id] => 14840247
[patent_doc_number] => 20190278524
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-09-12
[patent_title] => PERSISTENT RESERVATION EMULATION IN SHARED VIRTUAL STORAGE ENVIRONMENTS
[patent_app_type] => utility
[patent_app_number] => 15/955760
[patent_app_country] => US
[patent_app_date] => 2018-04-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11219
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15955760
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/955760 | Persistent reservation emulation in shared virtual storage environments | Apr 17, 2018 | Issued |
Array
(
[id] => 16844806
[patent_doc_number] => 11016895
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-05-25
[patent_title] => Caching for heterogeneous processors
[patent_app_type] => utility
[patent_app_number] => 15/947020
[patent_app_country] => US
[patent_app_date] => 2018-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 6
[patent_no_of_words] => 3630
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15947020
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/947020 | Caching for heterogeneous processors | Apr 5, 2018 | Issued |