
Hiep T. Nguyen
Examiner (ID: 17279, Phone: (571)272-4197 , Office: P/2131 )
| Most Active Art Unit | 2187 |
| Art Unit(s) | 2759, 2188, 2138, 2751, 2131, 2137, 2187, 2312 |
| Total Applications | 2199 |
| Issued Applications | 1997 |
| Pending Applications | 68 |
| Abandoned Applications | 150 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19588215
[patent_doc_number] => 20240385772
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-21
[patent_title] => STORAGE SYSTEM HAVING ROVING MEMORY REGION
[patent_app_type] => utility
[patent_app_number] => 18/786035
[patent_app_country] => US
[patent_app_date] => 2024-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 45351
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18786035
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/786035 | Storage system having roving memory region | Jul 25, 2024 | Issued |
Array
(
[id] => 20500494
[patent_doc_number] => 20260029954
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-01-29
[patent_title] => Data Storage Device and Method for Metadata Retrieval and Bypassing
[patent_app_type] => utility
[patent_app_number] => 18/785249
[patent_app_country] => US
[patent_app_date] => 2024-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1197
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18785249
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/785249 | Data storage device and method for metadata retrieval and bypassing | Jul 25, 2024 | Issued |
Array
(
[id] => 20500492
[patent_doc_number] => 20260029952
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-01-29
[patent_title] => GENERATING TOKENS USING NEAR-MEMORY COMPUTING
[patent_app_type] => utility
[patent_app_number] => 18/784199
[patent_app_country] => US
[patent_app_date] => 2024-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11157
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -27
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18784199
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/784199 | GENERATING TOKENS USING NEAR-MEMORY COMPUTING | Jul 24, 2024 | Pending |
Array
(
[id] => 20702937
[patent_doc_number] => 12625648
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-05-12
[patent_title] => Activate information on preceding precharge command
[patent_app_type] => utility
[patent_app_number] => 18/784429
[patent_app_country] => US
[patent_app_date] => 2024-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 8203
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18784429
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/784429 | Activate information on preceding precharge command | Jul 24, 2024 | Issued |
Array
(
[id] => 20494101
[patent_doc_number] => 12535970
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-01-27
[patent_title] => Unmap backlog in a memory system
[patent_app_type] => utility
[patent_app_number] => 18/749469
[patent_app_country] => US
[patent_app_date] => 2024-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 10198
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18749469
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/749469 | Unmap backlog in a memory system | Jun 19, 2024 | Issued |
Array
(
[id] => 20434207
[patent_doc_number] => 12504888
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-12-23
[patent_title] => Data access method of solid-state drive device and solid-state drive device
[patent_app_type] => utility
[patent_app_number] => 18/739337
[patent_app_country] => US
[patent_app_date] => 2024-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 0
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18739337
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/739337 | Data access method of solid-state drive device and solid-state drive device | Jun 10, 2024 | Issued |
Array
(
[id] => 20666571
[patent_doc_number] => 12608346
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-04-21
[patent_title] => Maintaining replica file systems
[patent_app_type] => utility
[patent_app_number] => 18/736801
[patent_app_country] => US
[patent_app_date] => 2024-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 26
[patent_no_of_words] => 58627
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18736801
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/736801 | Maintaining replica file systems | Jun 6, 2024 | Issued |
Array
(
[id] => 19617532
[patent_doc_number] => 20240403212
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-05
[patent_title] => COMPUTER-READABLE RECORDING MEDIUM STORING DATA PROCESSING PROGRAM, DATA PROCESSING DEVICE, AND DATA PROCESSING SYSTEM
[patent_app_type] => utility
[patent_app_number] => 18/677988
[patent_app_country] => US
[patent_app_date] => 2024-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7721
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18677988
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/677988 | COMPUTER-READABLE RECORDING MEDIUM STORING DATA PROCESSING PROGRAM, DATA PROCESSING DEVICE, AND DATA PROCESSING SYSTEM | May 29, 2024 | Abandoned |
Array
(
[id] => 19450907
[patent_doc_number] => 20240311037
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-19
[patent_title] => STORAGE SYSTEM WITH MULTIPLE WRITE PATHS
[patent_app_type] => utility
[patent_app_number] => 18/679265
[patent_app_country] => US
[patent_app_date] => 2024-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 36500
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18679265
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/679265 | Storage system with multiple write paths | May 29, 2024 | Issued |
Array
(
[id] => 19617245
[patent_doc_number] => 20240402925
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-05
[patent_title] => BOOT AND INITIALIZATION TECHNIQUES FOR STACKED MEMORY ARCHITECTURES
[patent_app_type] => utility
[patent_app_number] => 18/671485
[patent_app_country] => US
[patent_app_date] => 2024-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19276
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18671485
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/671485 | Boot and initialization techniques for stacked memory architectures | May 21, 2024 | Issued |
Array
(
[id] => 19617245
[patent_doc_number] => 20240402925
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-05
[patent_title] => BOOT AND INITIALIZATION TECHNIQUES FOR STACKED MEMORY ARCHITECTURES
[patent_app_type] => utility
[patent_app_number] => 18/671485
[patent_app_country] => US
[patent_app_date] => 2024-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19276
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18671485
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/671485 | Boot and initialization techniques for stacked memory architectures | May 21, 2024 | Issued |
Array
(
[id] => 19405772
[patent_doc_number] => 20240289283
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-29
[patent_title] => MEMORY ACCESS DETERMINATION
[patent_app_type] => utility
[patent_app_number] => 18/654749
[patent_app_country] => US
[patent_app_date] => 2024-05-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9820
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18654749
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/654749 | Memory access determination | May 2, 2024 | Issued |
Array
(
[id] => 20717092
[patent_doc_number] => 12632343
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-05-19
[patent_title] => Implementing data protection policies based on defined data loss levels
[patent_app_type] => utility
[patent_app_number] => 18/651428
[patent_app_country] => US
[patent_app_date] => 2024-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 0
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18651428
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/651428 | Implementing data protection policies based on defined data loss levels | Apr 29, 2024 | Issued |
Array
(
[id] => 20304024
[patent_doc_number] => 12450012
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-10-21
[patent_title] => Memory die stack chip ID-based command structure
[patent_app_type] => utility
[patent_app_number] => 18/634649
[patent_app_country] => US
[patent_app_date] => 2024-04-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 9779
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18634649
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/634649 | Memory die stack chip ID-based command structure | Apr 11, 2024 | Issued |
Array
(
[id] => 20289943
[patent_doc_number] => 20250315186
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-09
[patent_title] => COMMUNICATION DEVICE AND METHOD FOR HANDLING A DATA TRANSMISSION
[patent_app_type] => utility
[patent_app_number] => 18/628822
[patent_app_country] => US
[patent_app_date] => 2024-04-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18628822
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/628822 | Communication device and method for handling a data transmission | Apr 7, 2024 | Issued |
Array
(
[id] => 19514056
[patent_doc_number] => 20240345742
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-17
[patent_title] => PERSISTENT MEMORY WITH CACHE COHERENT INTERCONNECT INTERFACE
[patent_app_type] => utility
[patent_app_number] => 18/629925
[patent_app_country] => US
[patent_app_date] => 2024-04-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 17946
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18629925
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/629925 | Persistent memory with cache coherent interconnect interface | Apr 7, 2024 | Issued |
Array
(
[id] => 20345092
[patent_doc_number] => 12468824
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-11-11
[patent_title] => Maintaining encryption during storage system replication
[patent_app_type] => utility
[patent_app_number] => 18/623869
[patent_app_country] => US
[patent_app_date] => 2024-04-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 38
[patent_figures_cnt] => 39
[patent_no_of_words] => 45529
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18623869
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/623869 | Maintaining encryption during storage system replication | Mar 31, 2024 | Issued |
Array
(
[id] => 19481842
[patent_doc_number] => 20240329884
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-03
[patent_title] => METHOD AND A MEMORY CONTROLLER FOR MANAGING MEMORY OPERATIONS IN A STORAGE DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/622307
[patent_app_country] => US
[patent_app_date] => 2024-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8203
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18622307
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/622307 | Method and a memory controller for managing memory operations in a storage device | Mar 28, 2024 | Issued |
Array
(
[id] => 20145522
[patent_doc_number] => 12379864
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-08-05
[patent_title] => Empty page scan operations adjustment
[patent_app_type] => utility
[patent_app_number] => 18/617430
[patent_app_country] => US
[patent_app_date] => 2024-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3696
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18617430
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/617430 | Empty page scan operations adjustment | Mar 25, 2024 | Issued |
Array
(
[id] => 20481656
[patent_doc_number] => 12530131
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-01-20
[patent_title] => Memory device, memory system, and method of operating the same
[patent_app_type] => utility
[patent_app_number] => 18/615660
[patent_app_country] => US
[patent_app_date] => 2024-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 23
[patent_no_of_words] => 6302
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 176
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18615660
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/615660 | Memory device, memory system, and method of operating the same | Mar 24, 2024 | Issued |