
Hiep T. Nguyen
Examiner (ID: 18287, Phone: (571)272-4197 , Office: P/2131 )
| Most Active Art Unit | 2187 |
| Art Unit(s) | 2187, 2131, 2759, 2751, 2137, 2188, 2312, 2138 |
| Total Applications | 2185 |
| Issued Applications | 1977 |
| Pending Applications | 88 |
| Abandoned Applications | 149 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 12140034
[patent_doc_number] => 20180018117
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-01-18
[patent_title] => 'Wearable Device Assembly with Ability to Mitigate Data Loss Due to Component Failure'
[patent_app_type] => utility
[patent_app_number] => 15/715616
[patent_app_country] => US
[patent_app_date] => 2017-09-26
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/715616 | Wearable device assembly with ability to mitigate data loss due to component failure | Sep 25, 2017 | Issued |
Array
(
[id] => 12128078
[patent_doc_number] => 20180011664
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-01-11
[patent_title] => 'Flushless Transactional Layer'
[patent_app_type] => utility
[patent_app_number] => 15/715002
[patent_app_country] => US
[patent_app_date] => 2017-09-25
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/715002 | Flushless transactional layer | Sep 24, 2017 | Issued |
Array
(
[id] => 15312831
[patent_doc_number] => 10521119
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-12-31
[patent_title] => Hybrid copying garbage collector
[patent_app_type] => utility
[patent_app_number] => 15/712340
[patent_app_country] => US
[patent_app_date] => 2017-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/712340 | Hybrid copying garbage collector | Sep 21, 2017 | Issued |
Array
(
[id] => 12712807
[patent_doc_number] => 20180129435
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-05-10
[patent_title] => BROWSE AND RESTORE FOR BLOCK-LEVEL BACKUPS
[patent_app_type] => utility
[patent_app_number] => 15/705629
[patent_app_country] => US
[patent_app_date] => 2017-09-15
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/705629 | Browse and restore for block-level backups | Sep 14, 2017 | Issued |
Array
(
[id] => 12235832
[patent_doc_number] => 20180068695
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-03-08
[patent_title] => 'MANAGING DISTURBANCE INDUCED ERRORS'
[patent_app_type] => utility
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[patent_app_date] => 2017-09-13
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/703589 | Managing disturbance induced errors | Sep 12, 2017 | Issued |
Array
(
[id] => 12128212
[patent_doc_number] => 20180011798
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-01-11
[patent_title] => 'MEMORY HEAPS IN A MEMORY MODEL FOR A UNIFIED COMPUTING SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 15/695683
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[patent_app_date] => 2017-09-05
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/695683 | Memory heaps in a memory model for a unified computing system | Sep 4, 2017 | Issued |
Array
(
[id] => 13706581
[patent_doc_number] => 20170364245
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[patent_kind] => A1
[patent_issue_date] => 2017-12-21
[patent_title] => PREDICTIVE CACHING AND FETCH PRIORITY
[patent_app_type] => utility
[patent_app_number] => 15/694722
[patent_app_country] => US
[patent_app_date] => 2017-09-01
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/694722 | Predictive caching and fetch priority | Aug 31, 2017 | Issued |
Array
(
[id] => 14856329
[patent_doc_number] => 10416888
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[patent_issue_date] => 2019-09-17
[patent_title] => Parallel processing device, method for controlling parallel processing device, and controller used in parallel processing device
[patent_app_type] => utility
[patent_app_number] => 15/686768
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/686768 | Parallel processing device, method for controlling parallel processing device, and controller used in parallel processing device | Aug 24, 2017 | Issued |
Array
(
[id] => 14330871
[patent_doc_number] => 10296454
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[patent_issue_date] => 2019-05-21
[patent_title] => Granular unmapping with variable addressing in a data store
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Array
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[patent_issue_date] => 2019-10-08
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/672331 | Replicating a storage entity stored in a given storage system to multiple other storage systems | Aug 8, 2017 | Issued |
Array
(
[id] => 13933283
[patent_doc_number] => 20190050157
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[patent_kind] => A1
[patent_issue_date] => 2019-02-14
[patent_title] => PROVIDING PREFERENTIAL ACCESS TO A METADATA TRACK IN TWO TRACK WRITES
[patent_app_type] => utility
[patent_app_number] => 15/671714
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[patent_app_date] => 2017-08-08
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/671714 | Providing preferential access to a metadata track in two track writes | Aug 7, 2017 | Issued |
Array
(
[id] => 13933655
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[patent_issue_date] => 2019-02-14
[patent_title] => NONVOLATILE MEMORY DEVICES AND METHODS OF CONTROLLING THE SAME
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/671855 | Nonvolatile memory devices and methods of controlling the same | Aug 7, 2017 | Issued |
Array
(
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Array
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[id] => 13721745
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[patent_title] => Memory with Alternative Command Interfaces
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/647983 | Memory with alternative command interfaces | Jul 11, 2017 | Issued |
Array
(
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[patent_title] => 'SYSTEM AND METHODS FOR DEFINING OBJECT MEMORY FORMAT IN MEMORY AND STORE FOR OBJECT INTERACTIONS, MANIPULATION, AND EXCHANGE IN DISTRIBUTED NETWORK DEVICES'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/644139 | System and methods for defining object memory format in memory and store for object interactions, manipulation, and exchange in distributed network devices | Jul 6, 2017 | Issued |
Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/633571 | Two-level system main memory | Jun 25, 2017 | Issued |
Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/625631 | Matching pointers across levels of a memory hierarchy | Jun 15, 2017 | Issued |