
Hiep T. Nguyen
Examiner (ID: 18287, Phone: (571)272-4197 , Office: P/2131 )
| Most Active Art Unit | 2187 |
| Art Unit(s) | 2187, 2131, 2759, 2751, 2137, 2188, 2312, 2138 |
| Total Applications | 2185 |
| Issued Applications | 1977 |
| Pending Applications | 88 |
| Abandoned Applications | 149 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5981513
[patent_doc_number] => 20110072229
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-03-24
[patent_title] => 'METHOD OF MIRRORING DATA BETWEEN CLUSTERED NAS SYSTEMS'
[patent_app_type] => utility
[patent_app_number] => 12/957680
[patent_app_country] => US
[patent_app_date] => 2010-12-01
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 8658
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[pdf_file] => publications/A1/0072/20110072229.pdf
[firstpage_image] =>[orig_patent_app_number] => 12957680
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/957680 | Method of mirroring data between clustered NAS systems | Nov 30, 2010 | Issued |
Array
(
[id] => 7562911
[patent_doc_number] => 20110276745
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-11-10
[patent_title] => 'TECHNIQUES FOR WRITING DATA TO DIFFERENT PORTIONS OF STORAGE DEVICES BASED ON WRITE FREQUENCY'
[patent_app_type] => utility
[patent_app_number] => 12/956926
[patent_app_country] => US
[patent_app_date] => 2010-11-30
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0276/20110276745.pdf
[firstpage_image] =>[orig_patent_app_number] => 12956926
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/956926 | Techniques for writing data to different portions of storage devices based on write frequency | Nov 29, 2010 | Issued |
Array
(
[id] => 8958966
[patent_doc_number] => 08504760
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[patent_kind] => B2
[patent_issue_date] => 2013-08-06
[patent_title] => 'Method and apparatus for managing erase count of memory device'
[patent_app_type] => utility
[patent_app_number] => 12/948157
[patent_app_country] => US
[patent_app_date] => 2010-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/948157 | Method and apparatus for managing erase count of memory device | Nov 16, 2010 | Issued |
Array
(
[id] => 8645568
[patent_doc_number] => 08370565
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-02-05
[patent_title] => 'Boot system'
[patent_app_type] => utility
[patent_app_number] => 12/947726
[patent_app_country] => US
[patent_app_date] => 2010-11-16
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/947726 | Boot system | Nov 15, 2010 | Issued |
Array
(
[id] => 6147290
[patent_doc_number] => 20110131367
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[patent_kind] => A1
[patent_issue_date] => 2011-06-02
[patent_title] => 'NONVOLATILE MEMORY DEVICE, MEMORY SYSTEM COMPRISING NONVOLATILE MEMORY DEVICE, AND WEAR LEVELING METHOD FOR NONVOLATILE MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/947003
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[patent_app_date] => 2010-11-16
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[pdf_file] => publications/A1/0131/20110131367.pdf
[firstpage_image] =>[orig_patent_app_number] => 12947003
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/947003 | Nonvolatile memory device, memory system comprising nonvolatile memory device, and wear leveling method for nonvolatile memory device | Nov 15, 2010 | Issued |
Array
(
[id] => 6006055
[patent_doc_number] => 20110119465
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-05-19
[patent_title] => 'DATA PROCESSING SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 12/946364
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[firstpage_image] =>[orig_patent_app_number] => 12946364
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/946364 | DATA PROCESSING SYSTEM | Nov 14, 2010 | Abandoned |
Array
(
[id] => 8189140
[patent_doc_number] => 20120117329
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-10
[patent_title] => 'COMBINATION BASED LRU CACHING'
[patent_app_type] => utility
[patent_app_number] => 12/942249
[patent_app_country] => US
[patent_app_date] => 2010-11-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 4034
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[pdf_file] => publications/A1/0117/20120117329.pdf
[firstpage_image] =>[orig_patent_app_number] => 12942249
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/942249 | Combination based LRU caching | Nov 8, 2010 | Issued |
Array
(
[id] => 4631859
[patent_doc_number] => 08010769
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-08-30
[patent_title] => 'Systems and methods for classifying and transferring information in a storage network'
[patent_app_type] => utility
[patent_app_number] => 12/939244
[patent_app_country] => US
[patent_app_date] => 2010-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
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[pdf_file] => patents/08/010/08010769.pdf
[firstpage_image] =>[orig_patent_app_number] => 12939244
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/939244 | Systems and methods for classifying and transferring information in a storage network | Nov 3, 2010 | Issued |
Array
(
[id] => 9611587
[patent_doc_number] => 08788776
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[patent_issue_date] => 2014-07-22
[patent_title] => 'Hard disk control method, hard disk control device and computer'
[patent_app_type] => utility
[patent_app_number] => 13/508151
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/508151 | Hard disk control method, hard disk control device and computer | Oct 28, 2010 | Issued |
Array
(
[id] => 6073496
[patent_doc_number] => 20110047324
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[patent_kind] => A1
[patent_issue_date] => 2011-02-24
[patent_title] => 'Memory device with vertically embedded non-Flash non-volatile memory for emulation of nand flash memory'
[patent_app_type] => utility
[patent_app_number] => 12/925631
[patent_app_country] => US
[patent_app_date] => 2010-10-25
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/925631 | Memory device with vertically embedded non-flash non-volatile memory for emulation of NAND flash memory | Oct 24, 2010 | Issued |
Array
(
[id] => 10065496
[patent_doc_number] => 09104342
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[patent_issue_date] => 2015-08-11
[patent_title] => 'Two stage checksummed raid storage model'
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[patent_app_number] => 13/880319
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/880319 | Two stage checksummed raid storage model | Oct 20, 2010 | Issued |
Array
(
[id] => 8661244
[patent_doc_number] => 20130042073
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[patent_issue_date] => 2013-02-14
[patent_title] => 'Hybrid Automatic Repeat Request Combiner and Method for Storing Hybrid Automatic Repeat Request Data'
[patent_app_type] => utility
[patent_app_number] => 13/379683
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/379683 | Hybrid automatic repeat request combiner and method for storing hybrid automatic repeat request data | Oct 18, 2010 | Issued |
Array
(
[id] => 8693125
[patent_doc_number] => 08392661
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[patent_title] => 'Managing cache coherence'
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Array
(
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[patent_title] => 'Supporting secondary atomic operations using primary atomic operations'
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Array
(
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[patent_title] => 'SELECTIVE MEMORY COMPRESSION FOR MULTI-THREADED APPLICATIONS'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/885743 | Selective memory compression for multi-threaded applications | Sep 19, 2010 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/885754 | Multi-core processor system and multi-core processor | Sep 19, 2010 | Issued |
Array
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/880958 | Avoiding memory access latency by returning hit-modified when holding non-modified data | Sep 12, 2010 | Issued |