Search

Hiep T. Nguyen

Examiner (ID: 18287, Phone: (571)272-4197 , Office: P/2131 )

Most Active Art Unit
2187
Art Unit(s)
2187, 2131, 2759, 2751, 2137, 2188, 2312, 2138
Total Applications
2185
Issued Applications
1977
Pending Applications
88
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8580826 [patent_doc_number] => 08347057 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-01 [patent_title] => 'Memory module' [patent_app_type] => utility [patent_app_number] => 12/805689 [patent_app_country] => US [patent_app_date] => 2010-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 69 [patent_no_of_words] => 9577 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12805689 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/805689
Memory module Aug 12, 2010 Issued
Array ( [id] => 6643422 [patent_doc_number] => 20100312968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-09 [patent_title] => 'Arithmetic processing apparatus and method of controlling the same' [patent_app_type] => utility [patent_app_number] => 12/805691 [patent_app_country] => US [patent_app_date] => 2010-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 16321 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0312/20100312968.pdf [firstpage_image] =>[orig_patent_app_number] => 12805691 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/805691
Arithmetic processing apparatus and method of controlling the same Aug 12, 2010 Issued
Array ( [id] => 6140557 [patent_doc_number] => 20110010508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-13 [patent_title] => 'Memory system and information processing device' [patent_app_type] => utility [patent_app_number] => 12/805098 [patent_app_country] => US [patent_app_date] => 2010-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 21285 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0010/20110010508.pdf [firstpage_image] =>[orig_patent_app_number] => 12805098 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/805098
Memory system and information processing device Jul 11, 2010 Issued
Array ( [id] => 7721964 [patent_doc_number] => 20120011299 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'Memory device with dynamic controllable physical logical mapping table loading' [patent_app_type] => utility [patent_app_number] => 12/803899 [patent_app_country] => US [patent_app_date] => 2010-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7654 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0011/20120011299.pdf [firstpage_image] =>[orig_patent_app_number] => 12803899 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/803899
Memory device with dynamic controllable physical logical mapping table loading Jul 8, 2010 Issued
Array ( [id] => 4549038 [patent_doc_number] => 07925835 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-12 [patent_title] => 'Content network global replacement policy' [patent_app_type] => utility [patent_app_number] => 12/833211 [patent_app_country] => US [patent_app_date] => 2010-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6316 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/925/07925835.pdf [firstpage_image] =>[orig_patent_app_number] => 12833211 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/833211
Content network global replacement policy Jul 8, 2010 Issued
Array ( [id] => 7714159 [patent_doc_number] => 20120005454 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-05 [patent_title] => 'Data processing apparatus for storing address translations' [patent_app_type] => utility [patent_app_number] => 12/801926 [patent_app_country] => US [patent_app_date] => 2010-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9757 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20120005454.pdf [firstpage_image] =>[orig_patent_app_number] => 12801926 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/801926
Data processing apparatus for storing address translations Jun 30, 2010 Issued
Array ( [id] => 8540455 [patent_doc_number] => 08316182 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-20 [patent_title] => 'Hierarchical storage management for database systems' [patent_app_type] => utility [patent_app_number] => 12/797942 [patent_app_country] => US [patent_app_date] => 2010-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 8592 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12797942 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/797942
Hierarchical storage management for database systems Jun 9, 2010 Issued
Array ( [id] => 8594824 [patent_doc_number] => 08352707 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-08 [patent_title] => 'Implementing enhanced host to physical storage mapping using numerical compositions for persistent media' [patent_app_type] => utility [patent_app_number] => 12/797683 [patent_app_country] => US [patent_app_date] => 2010-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3000 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12797683 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/797683
Implementing enhanced host to physical storage mapping using numerical compositions for persistent media Jun 9, 2010 Issued
Array ( [id] => 8235449 [patent_doc_number] => 08200902 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-12 [patent_title] => 'Cache device for coupling to a memory device and a method of operation of such a cache device' [patent_app_type] => utility [patent_app_number] => 12/801484 [patent_app_country] => US [patent_app_date] => 2010-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 17332 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/200/08200902.pdf [firstpage_image] =>[orig_patent_app_number] => 12801484 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/801484
Cache device for coupling to a memory device and a method of operation of such a cache device Jun 9, 2010 Issued
Array ( [id] => 6362600 [patent_doc_number] => 20100332778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'CONTROL UNIT FOR STORAGE DEVICE AND METHOD FOR CONTROLLING STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 12/792929 [patent_app_country] => US [patent_app_date] => 2010-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4696 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0332/20100332778.pdf [firstpage_image] =>[orig_patent_app_number] => 12792929 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/792929
Control unit for storage device and method for controlling storage device Jun 2, 2010 Issued
Array ( [id] => 6166119 [patent_doc_number] => 20110161566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'WRITE TIMEOUT CONTROL METHODS FOR FLASH MEMORY AND MEMORY DEVICES USING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/792864 [patent_app_country] => US [patent_app_date] => 2010-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4946 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20110161566.pdf [firstpage_image] =>[orig_patent_app_number] => 12792864 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/792864
Write timeout control methods for flash memory and memory devices using the same Jun 2, 2010 Issued
Array ( [id] => 8594810 [patent_doc_number] => 08352693 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-08 [patent_title] => 'Storage control apparatus' [patent_app_type] => utility [patent_app_number] => 12/792997 [patent_app_country] => US [patent_app_date] => 2010-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 21 [patent_no_of_words] => 15043 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12792997 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/792997
Storage control apparatus Jun 2, 2010 Issued
Array ( [id] => 7653103 [patent_doc_number] => 20110302372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-08 [patent_title] => 'SMT/ECO MODE BASED ON CACHE MISS RATE' [patent_app_type] => utility [patent_app_number] => 12/792850 [patent_app_country] => US [patent_app_date] => 2010-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12936 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20110302372.pdf [firstpage_image] =>[orig_patent_app_number] => 12792850 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/792850
SMT/ECO mode based on cache miss rate Jun 2, 2010 Issued
Array ( [id] => 8655395 [patent_doc_number] => 08375162 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-12 [patent_title] => 'Method and apparatus for reducing write cycles in NAND-based flash memory devices' [patent_app_type] => utility [patent_app_number] => 12/793023 [patent_app_country] => US [patent_app_date] => 2010-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2724 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12793023 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/793023
Method and apparatus for reducing write cycles in NAND-based flash memory devices Jun 2, 2010 Issued
Array ( [id] => 7653119 [patent_doc_number] => 20110302388 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-08 [patent_title] => 'Hierarchical Scalable Memory Allocator' [patent_app_type] => utility [patent_app_number] => 12/792734 [patent_app_country] => US [patent_app_date] => 2010-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7952 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20110302388.pdf [firstpage_image] =>[orig_patent_app_number] => 12792734 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/792734
Hierarchical scalable memory allocator Jun 2, 2010 Issued
Array ( [id] => 8401367 [patent_doc_number] => 08271760 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-18 [patent_title] => 'Spatial locality of file system block allocations for related items' [patent_app_type] => utility [patent_app_number] => 12/793056 [patent_app_country] => US [patent_app_date] => 2010-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5145 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12793056 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/793056
Spatial locality of file system block allocations for related items Jun 2, 2010 Issued
Array ( [id] => 6337461 [patent_doc_number] => 20100199057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-05 [patent_title] => 'INDEPENDENT LINK AND BANK SELECTION' [patent_app_type] => utility [patent_app_number] => 12/757406 [patent_app_country] => US [patent_app_date] => 2010-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7793 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0199/20100199057.pdf [firstpage_image] =>[orig_patent_app_number] => 12757406 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/757406
Independent link and bank selection Apr 8, 2010 Issued
Array ( [id] => 4600582 [patent_doc_number] => 07984246 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-07-19 [patent_title] => 'Multicore memory management system' [patent_app_type] => utility [patent_app_number] => 12/755893 [patent_app_country] => US [patent_app_date] => 2010-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4732 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/984/07984246.pdf [firstpage_image] =>[orig_patent_app_number] => 12755893 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/755893
Multicore memory management system Apr 6, 2010 Issued
Array ( [id] => 6234221 [patent_doc_number] => 20100185824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-22 [patent_title] => 'METHOD AND APPARATUS FOR INCREASING AN AMOUNT OF MEMORY ON DEMAND WHEN MONITORING REMOTE MIRRORING PERFORMANCE' [patent_app_type] => utility [patent_app_number] => 12/732416 [patent_app_country] => US [patent_app_date] => 2010-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3790 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0185/20100185824.pdf [firstpage_image] =>[orig_patent_app_number] => 12732416 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/732416
Method and apparatus for increasing an amount of memory on demand when monitoring remote mirroring performance Mar 25, 2010 Issued
Array ( [id] => 9430895 [patent_doc_number] => 08706981 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-22 [patent_title] => 'Configurable status processing unit for sensor-actuator systems' [patent_app_type] => utility [patent_app_number] => 13/146443 [patent_app_country] => US [patent_app_date] => 2010-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4691 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13146443 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/146443
Configurable status processing unit for sensor-actuator systems Feb 2, 2010 Issued
Menu