Search

Hieu C. Le

Examiner (ID: 949)

Most Active Art Unit
2153
Art Unit(s)
2153, 2757, 2724, 2142
Total Applications
250
Issued Applications
160
Pending Applications
61
Abandoned Applications
29

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4192293 [patent_doc_number] => 06038196 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-14 [patent_title] => 'Semiconductor memory device having a synchronous DRAM' [patent_app_type] => 1 [patent_app_number] => 9/057616 [patent_app_country] => US [patent_app_date] => 1998-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3653 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/038/06038196.pdf [firstpage_image] =>[orig_patent_app_number] => 057616 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/057616
Semiconductor memory device having a synchronous DRAM Apr 8, 1998 Issued
Array ( [id] => 4159615 [patent_doc_number] => 06064611 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-16 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/055216 [patent_app_country] => US [patent_app_date] => 1998-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 15242 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/064/06064611.pdf [firstpage_image] =>[orig_patent_app_number] => 055216 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/055216
Semiconductor memory device Apr 5, 1998 Issued
Array ( [id] => 3963977 [patent_doc_number] => 05978273 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Non-volatile semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/050317 [patent_app_country] => US [patent_app_date] => 1998-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12140 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/978/05978273.pdf [firstpage_image] =>[orig_patent_app_number] => 050317 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/050317
Non-volatile semiconductor memory device Mar 29, 1998 Issued
Array ( [id] => 4144794 [patent_doc_number] => 06016279 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-18 [patent_title] => 'DRAM sensing scheme and isolation circuit' [patent_app_type] => 1 [patent_app_number] => 9/050212 [patent_app_country] => US [patent_app_date] => 1998-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4621 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/016/06016279.pdf [firstpage_image] =>[orig_patent_app_number] => 050212 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/050212
DRAM sensing scheme and isolation circuit Mar 29, 1998 Issued
Array ( [id] => 4202274 [patent_doc_number] => 06130853 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'Address decoding scheme for DDR memory' [patent_app_type] => 1 [patent_app_number] => 9/050216 [patent_app_country] => US [patent_app_date] => 1998-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 24 [patent_no_of_words] => 6632 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/130/06130853.pdf [firstpage_image] =>[orig_patent_app_number] => 050216 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/050216
Address decoding scheme for DDR memory Mar 29, 1998 Issued
Array ( [id] => 3998488 [patent_doc_number] => 05959914 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-28 [patent_title] => 'Memory controller with error correction memory test application' [patent_app_type] => 1 [patent_app_number] => 9/049316 [patent_app_country] => US [patent_app_date] => 1998-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 6054 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/959/05959914.pdf [firstpage_image] =>[orig_patent_app_number] => 049316 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/049316
Memory controller with error correction memory test application Mar 26, 1998 Issued
Array ( [id] => 3970399 [patent_doc_number] => 05936912 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Electronic device and semiconductor memory device using the same' [patent_app_type] => 1 [patent_app_number] => 9/034407 [patent_app_country] => US [patent_app_date] => 1998-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 23 [patent_no_of_words] => 6209 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/936/05936912.pdf [firstpage_image] =>[orig_patent_app_number] => 034407 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/034407
Electronic device and semiconductor memory device using the same Mar 3, 1998 Issued
Array ( [id] => 4045670 [patent_doc_number] => 05943260 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-24 [patent_title] => 'Method for high-speed programming of a nonvolatile semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/027215 [patent_app_country] => US [patent_app_date] => 1998-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 22 [patent_no_of_words] => 4568 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/943/05943260.pdf [firstpage_image] =>[orig_patent_app_number] => 027215 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/027215
Method for high-speed programming of a nonvolatile semiconductor memory device Feb 19, 1998 Issued
09/018693 FRAM, FRAM CARD, AND CARD SYSTEM USING THE SAME Feb 3, 1998 Issued
Array ( [id] => 4131049 [patent_doc_number] => 06072713 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-06 [patent_title] => 'Data storage circuit using shared bit line and method therefor' [patent_app_type] => 1 [patent_app_number] => 9/018711 [patent_app_country] => US [patent_app_date] => 1998-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 3191 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/072/06072713.pdf [firstpage_image] =>[orig_patent_app_number] => 018711 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/018711
Data storage circuit using shared bit line and method therefor Feb 3, 1998 Issued
Array ( [id] => 4193792 [patent_doc_number] => 06021064 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-01 [patent_title] => 'Layout for data storage circuit using shared bit line and method therefor' [patent_app_type] => 1 [patent_app_number] => 9/018712 [patent_app_country] => US [patent_app_date] => 1998-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 3424 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/021/06021064.pdf [firstpage_image] =>[orig_patent_app_number] => 018712 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/018712
Layout for data storage circuit using shared bit line and method therefor Feb 3, 1998 Issued
Array ( [id] => 4045881 [patent_doc_number] => 05943274 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-24 [patent_title] => 'Method and apparatus for amplifying a signal to produce a latched digital signal' [patent_app_type] => 1 [patent_app_number] => 9/016914 [patent_app_country] => US [patent_app_date] => 1998-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3667 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/943/05943274.pdf [firstpage_image] =>[orig_patent_app_number] => 016914 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/016914
Method and apparatus for amplifying a signal to produce a latched digital signal Feb 1, 1998 Issued
Array ( [id] => 3932635 [patent_doc_number] => 05914903 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-22 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/015912 [patent_app_country] => US [patent_app_date] => 1998-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 10083 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/914/05914903.pdf [firstpage_image] =>[orig_patent_app_number] => 015912 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/015912
Semiconductor memory device Jan 29, 1998 Issued
Array ( [id] => 3970358 [patent_doc_number] => 05936909 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Static random access memory' [patent_app_type] => 1 [patent_app_number] => 9/013911 [patent_app_country] => US [patent_app_date] => 1998-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 7834 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/936/05936909.pdf [firstpage_image] =>[orig_patent_app_number] => 013911 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/013911
Static random access memory Jan 26, 1998 Issued
09/003616 MULTI-PORT SEMICONDUCTOR MEMORY DEVICE WITH REDUCED COUPLING NOISE Jan 6, 1998 Issued
Array ( [id] => 4034707 [patent_doc_number] => 05926434 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-20 [patent_title] => 'Synchronous semiconductor memory device capable of reducing electricity consumption on standby' [patent_app_type] => 1 [patent_app_number] => 8/998016 [patent_app_country] => US [patent_app_date] => 1997-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 10512 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/926/05926434.pdf [firstpage_image] =>[orig_patent_app_number] => 998016 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/998016
Synchronous semiconductor memory device capable of reducing electricity consumption on standby Dec 23, 1997 Issued
Array ( [id] => 4065123 [patent_doc_number] => 05969999 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'Merged memory logic integrated circuits including buffers driven by adjustably delayed clock signals' [patent_app_type] => 1 [patent_app_number] => 8/994506 [patent_app_country] => US [patent_app_date] => 1997-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3131 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/969/05969999.pdf [firstpage_image] =>[orig_patent_app_number] => 994506 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/994506
Merged memory logic integrated circuits including buffers driven by adjustably delayed clock signals Dec 18, 1997 Issued
Array ( [id] => 4026245 [patent_doc_number] => 05963504 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-05 [patent_title] => 'Address transition detection in a synchronous design' [patent_app_type] => 1 [patent_app_number] => 8/994180 [patent_app_country] => US [patent_app_date] => 1997-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7885 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/963/05963504.pdf [firstpage_image] =>[orig_patent_app_number] => 994180 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/994180
Address transition detection in a synchronous design Dec 18, 1997 Issued
Array ( [id] => 4065259 [patent_doc_number] => 05970008 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'Efficient method for obtaining usable parts from a partially good memory integrated circuit' [patent_app_type] => 1 [patent_app_number] => 8/993824 [patent_app_country] => US [patent_app_date] => 1997-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4593 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/970/05970008.pdf [firstpage_image] =>[orig_patent_app_number] => 993824 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/993824
Efficient method for obtaining usable parts from a partially good memory integrated circuit Dec 17, 1997 Issued
Array ( [id] => 3947170 [patent_doc_number] => 05940329 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-17 [patent_title] => 'Memory architecture and systems and methods using the same' [patent_app_type] => 1 [patent_app_number] => 8/992416 [patent_app_country] => US [patent_app_date] => 1997-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 7121 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/940/05940329.pdf [firstpage_image] =>[orig_patent_app_number] => 992416 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/992416
Memory architecture and systems and methods using the same Dec 16, 1997 Issued
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