Hiren P. Patel

Array ( [id] => 14457811 [patent_doc_number] => 10324867 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-18 [patent_title] => Systems and devices having a scalable basic input/output system (BIOS) footprint and associated methods [patent_app_type] => utility [patent_app_number] => 15/482646 [patent_app_country] => US [patent_app_date] => 2017-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 9043 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15482646 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14952997 [patent_doc_number] => 10437763 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-08 [patent_title] => Method and device for universal serial bus (USB) communication [patent_app_type] => utility [patent_app_number] => 15/481785 [patent_app_country] => US [patent_app_date] => 2017-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8024 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15481785 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13017533 [patent_doc_number] => 10031881 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-07-24 [patent_title] => USB controller with automatic clock generation and method thereof [patent_app_type] => utility [patent_app_number] => 15/481557 [patent_app_country] => US [patent_app_date] => 2017-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2034 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15481557 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11838791 [patent_doc_number] => 20170220511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-03 [patent_title] => 'GENERAL-PURPOSE PARALLEL COMPUTING ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 15/481201 [patent_app_country] => US [patent_app_date] => 2017-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 16590 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15481201 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14735917 [patent_doc_number] => 10387358 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-20 [patent_title] => Multi-PCIe socket NIC OS interface [patent_app_type] => utility [patent_app_number] => 15/480407 [patent_app_country] => US [patent_app_date] => 2017-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4456 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15480407 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12229022 [patent_doc_number] => 09916267 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-03-13 [patent_title] => 'Migrating interrupts from a source I/O adapter of a source computing system to a destination I/O adapter of a destination computing system' [patent_app_type] => utility [patent_app_number] => 15/467025 [patent_app_country] => US [patent_app_date] => 2017-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7812 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15467025 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16501244 [patent_doc_number] => 10866627 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-15 [patent_title] => Type-C connector subsystem [patent_app_type] => utility [patent_app_number] => 15/464587 [patent_app_country] => US [patent_app_date] => 2017-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 10146 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15464587 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11945099 [patent_doc_number] => 20170249250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-31 [patent_title] => 'APPARATUS AND METHOD FOR IMPLEMENTING A MULTI-LEVEL MEMORY HIERARCHY' [patent_app_type] => utility [patent_app_number] => 15/457847 [patent_app_country] => US [patent_app_date] => 2017-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 19268 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15457847 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11903521 [patent_doc_number] => 09772955 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-26 [patent_title] => 'Electronic system and non-transitory computer readable recording medium can perform report rate setting method' [patent_app_type] => utility [patent_app_number] => 15/448554 [patent_app_country] => US [patent_app_date] => 2017-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 4453 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15448554 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11672178 [patent_doc_number] => 20170160900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-08 [patent_title] => 'COMMUNICATING BETWEEN A VIRTUAL AREA AND A PHYSICAL SPACE' [patent_app_type] => utility [patent_app_number] => 15/437335 [patent_app_country] => US [patent_app_date] => 2017-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 14304 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15437335 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11973096 [patent_doc_number] => 20170277250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-28 [patent_title] => 'DUAL-PROCESSOR SYSTEM AND CONTROL METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/428430 [patent_app_country] => US [patent_app_date] => 2017-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2698 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15428430 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11665284 [patent_doc_number] => 20170154004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-01 [patent_title] => 'INFORMATION PROCESSING APPARATUS AND METHOD FOR GENERATING COUPLING INFORMATION' [patent_app_type] => utility [patent_app_number] => 15/428359 [patent_app_country] => US [patent_app_date] => 2017-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 5424 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15428359 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14250345 [patent_doc_number] => 10275373 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-30 [patent_title] => Hot swappable device and method [patent_app_type] => utility [patent_app_number] => 15/422779 [patent_app_country] => US [patent_app_date] => 2017-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 9673 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15422779 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14887049 [patent_doc_number] => 10423567 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-24 [patent_title] => Unidirectional clock signaling in a high-speed serial link [patent_app_type] => utility [patent_app_number] => 15/422263 [patent_app_country] => US [patent_app_date] => 2017-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 42 [patent_no_of_words] => 29148 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15422263 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14614941 [patent_doc_number] => 10360172 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-07-23 [patent_title] => Decoupled peripheral devices [patent_app_type] => utility [patent_app_number] => 15/422126 [patent_app_country] => US [patent_app_date] => 2017-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11092 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15422126 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11621776 [patent_doc_number] => 20170131963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-11 [patent_title] => 'SYSTEM AND METHOD FOR DISPLAY MIRRORING' [patent_app_type] => utility [patent_app_number] => 15/413328 [patent_app_country] => US [patent_app_date] => 2017-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 15362 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15413328 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11731463 [patent_doc_number] => 20170192906 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-06 [patent_title] => 'METHOD AND APPARATUS FOR PREVENTING NON-TEMPORAL ENTRIES FROM POLLUTING SMALL STRUCTURES USING A TRANSIENT BUFFER' [patent_app_type] => utility [patent_app_number] => 15/408222 [patent_app_country] => US [patent_app_date] => 2017-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7729 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15408222 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11945126 [patent_doc_number] => 20170249277 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-31 [patent_title] => 'SPLIT TRANSACTION PROTOCOL FOR A BUS SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/400176 [patent_app_country] => US [patent_app_date] => 2017-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9721 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15400176 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12213962 [patent_doc_number] => 09910771 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-06 [patent_title] => 'Non-volatile memory interface' [patent_app_type] => utility [patent_app_number] => 15/396732 [patent_app_country] => US [patent_app_date] => 2017-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10187 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15396732 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11556672 [patent_doc_number] => 20170102919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-13 [patent_title] => 'SYSTEMS AND METHODS FOR LOW INTERFERENCE LOGGING AND DIAGNOSTICS' [patent_app_type] => utility [patent_app_number] => 15/389325 [patent_app_country] => US [patent_app_date] => 2016-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12764 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15389325 [rel_patent_id] =>[rel_patent_doc_number] =>)