Hiren P. Patel

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Array ( [id] => 12242118 [patent_doc_number] => 20180074981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-15 [patent_title] => 'ASSOCIATING DATA BUSES AND MANAGEMENT BUS CONNECTIONS FOR PERIPHERAL DEVICES' [patent_app_type] => utility [patent_app_number] => 15/265655 [patent_app_country] => US [patent_app_date] => 2016-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8974 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15265655 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11501660 [patent_doc_number] => 20170075845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-16 [patent_title] => 'SYSTEMS AND METHODS FOR OFFLOADING LINK AGGREGATION TO A HOST BUS ADAPTER (HBA) IN SINGLE ROOT I/O VIRTUALIZATION (SRIOV) MODE' [patent_app_type] => utility [patent_app_number] => 15/265252 [patent_app_country] => US [patent_app_date] => 2016-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3814 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15265252 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11501649 [patent_doc_number] => 20170075834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-16 [patent_title] => 'STORAGE DEVICE AND INTERRUPT GENERATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/265090 [patent_app_country] => US [patent_app_date] => 2016-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 15731 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15265090 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13817803 [patent_doc_number] => 10185670 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-22 [patent_title] => System and method for securely connecting to a peripheral device [patent_app_type] => utility [patent_app_number] => 15/750528 [patent_app_country] => US [patent_app_date] => 2016-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 48 [patent_no_of_words] => 68636 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15750528 [rel_patent_id] =>[rel_patent_doc_number] =>)

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Array ( [id] => 11327054 [patent_doc_number] => 20160357666 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-08 [patent_title] => 'MEMORY INTERLEAVING ON MEMORY CHANNELS' [patent_app_type] => utility [patent_app_number] => 15/244193 [patent_app_country] => US [patent_app_date] => 2016-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2656 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15244193 [rel_patent_id] =>[rel_patent_doc_number] =>)

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Array ( [id] => 12189389 [patent_doc_number] => 20180048325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-15 [patent_title] => 'MULTI-PATH ANALOG FRONT END WITH ADAPTIVE PATH' [patent_app_type] => utility [patent_app_number] => 15/234741 [patent_app_country] => US [patent_app_date] => 2016-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5889 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15234741 [rel_patent_id] =>[rel_patent_doc_number] =>)

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