
Hiwot E. Tefera
Examiner (ID: 17470, Phone: (571)270-3320 , Office: P/3637 )
| Most Active Art Unit | 3637 |
| Art Unit(s) | 3637 |
| Total Applications | 910 |
| Issued Applications | 645 |
| Pending Applications | 70 |
| Abandoned Applications | 214 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19575575
[patent_doc_number] => 20240379867
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-14
[patent_title] => TRANSISTOR INCLUDING AN ACTIVE REGION AND METHODS FOR FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/779017
[patent_app_country] => US
[patent_app_date] => 2024-07-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 18034
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18779017
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/779017 | TRANSISTOR INCLUDING AN ACTIVE REGION AND METHODS FOR FORMING THE SAME | Jul 20, 2024 | Pending |
Array
(
[id] => 19559986
[patent_doc_number] => 20240371778
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-07
[patent_title] => PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/772224
[patent_app_country] => US
[patent_app_date] => 2024-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5742
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18772224
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/772224 | PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME | Jul 13, 2024 | Pending |
Array
(
[id] => 19500463
[patent_doc_number] => 20240339481
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-10
[patent_title] => SOLID-STATE IMAGING DEVICE AND METHOD FOR MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS
[patent_app_type] => utility
[patent_app_number] => 18/746332
[patent_app_country] => US
[patent_app_date] => 2024-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11771
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18746332
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/746332 | SOLID-STATE IMAGING DEVICE AND METHOD FOR MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS | Jun 17, 2024 | Pending |
Array
(
[id] => 20625935
[patent_doc_number] => 12593460
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-03-31
[patent_title] => Multi-tier deep trench capacitor and methods of forming the same
[patent_app_type] => utility
[patent_app_number] => 18/733945
[patent_app_country] => US
[patent_app_date] => 2024-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 5547
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18733945
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/733945 | Multi-tier deep trench capacitor and methods of forming the same | Jun 4, 2024 | Issued |
Array
(
[id] => 20396941
[patent_doc_number] => 20250372416
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-12-04
[patent_title] => LASER TRANSFER STRUCTURE AND LASER TRANSFER METHOD
[patent_app_type] => utility
[patent_app_number] => 18/675527
[patent_app_country] => US
[patent_app_date] => 2024-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3295
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 39
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18675527
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/675527 | LASER TRANSFER STRUCTURE AND LASER TRANSFER METHOD | May 27, 2024 | Pending |
Array
(
[id] => 20369277
[patent_doc_number] => 20250359089
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-11-20
[patent_title] => PILLAR WITH EMBEDDED CAPACITOR
[patent_app_type] => utility
[patent_app_number] => 18/668585
[patent_app_country] => US
[patent_app_date] => 2024-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12907
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18668585
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/668585 | PILLAR WITH EMBEDDED CAPACITOR | May 19, 2024 | Pending |
Array
(
[id] => 19420943
[patent_doc_number] => 20240297067
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-05
[patent_title] => HIGH VOLTAGE DEVICE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/664656
[patent_app_country] => US
[patent_app_date] => 2024-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8732
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18664656
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/664656 | High voltage device and manufacturing method thereof | May 14, 2024 | Issued |
Array
(
[id] => 19760066
[patent_doc_number] => 20250048631
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-06
[patent_title] => SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/664690
[patent_app_country] => US
[patent_app_date] => 2024-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10796
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18664690
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/664690 | SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME | May 14, 2024 | Pending |
Array
(
[id] => 19422346
[patent_doc_number] => 20240298470
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-05
[patent_title] => DISPLAY APPARATUS
[patent_app_type] => utility
[patent_app_number] => 18/662759
[patent_app_country] => US
[patent_app_date] => 2024-05-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9729
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 237
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18662759
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/662759 | DISPLAY APPARATUS | May 12, 2024 | Pending |
Array
(
[id] => 19804163
[patent_doc_number] => 20250070088
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-27
[patent_title] => SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 18/660677
[patent_app_country] => US
[patent_app_date] => 2024-05-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9884
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18660677
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/660677 | SEMICONDUCTOR PACKAGE | May 9, 2024 | Pending |
Array
(
[id] => 19751564
[patent_doc_number] => 20250040129
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-30
[patent_title] => SEMICONDUCTOR DEVICE INCLUDING ACTIVE REGION AND BIT LINE
[patent_app_type] => utility
[patent_app_number] => 18/655731
[patent_app_country] => US
[patent_app_date] => 2024-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14332
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 201
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18655731
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/655731 | SEMICONDUCTOR DEVICE INCLUDING ACTIVE REGION AND BIT LINE | May 5, 2024 | Pending |
Array
(
[id] => 19648503
[patent_doc_number] => 20240423023
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-19
[patent_title] => DISPLAY PANEL AND DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/654404
[patent_app_country] => US
[patent_app_date] => 2024-05-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6669
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18654404
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/654404 | DISPLAY PANEL AND DISPLAY DEVICE | May 2, 2024 | Pending |
Array
(
[id] => 19994012
[patent_doc_number] => 20250132234
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-04-24
[patent_title] => INTERPOSER AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/652312
[patent_app_country] => US
[patent_app_date] => 2024-05-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2325
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18652312
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/652312 | INTERPOSER AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME | Apr 30, 2024 | Pending |
Array
(
[id] => 19421047
[patent_doc_number] => 20240297171
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-05
[patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/646677
[patent_app_country] => US
[patent_app_date] => 2024-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9683
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18646677
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/646677 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF | Apr 24, 2024 | Pending |
Array
(
[id] => 19901493
[patent_doc_number] => 12279446
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-04-15
[patent_title] => Manufacturing method of semiconductor device
[patent_app_type] => utility
[patent_app_number] => 18/645366
[patent_app_country] => US
[patent_app_date] => 2024-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 2329
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 294
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18645366
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/645366 | Manufacturing method of semiconductor device | Apr 23, 2024 | Issued |
Array
(
[id] => 20311982
[patent_doc_number] => 20250329611
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-23
[patent_title] => STRUCTURE AND METHODS FOR OPTIMIZING THROUGH SUBSTRATE VIAS AND COOLING CHANNELS IN A COMPOSITE SUBSTRATE
[patent_app_type] => utility
[patent_app_number] => 18/643267
[patent_app_country] => US
[patent_app_date] => 2024-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12083
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18643267
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/643267 | STRUCTURE AND METHODS FOR OPTIMIZING THROUGH SUBSTRATE VIAS AND COOLING CHANNELS IN A COMPOSITE SUBSTRATE | Apr 22, 2024 | Pending |
Array
(
[id] => 20312043
[patent_doc_number] => 20250329672
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-23
[patent_title] => BONDING SCHEME TO PROVIDE IMPROVED COPLANARITY AND HIGH JOINT YIELDS WITH REDUCED COSTS AND METHODS FOR FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/641473
[patent_app_country] => US
[patent_app_date] => 2024-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8701
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18641473
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/641473 | BONDING SCHEME TO PROVIDE IMPROVED COPLANARITY AND HIGH JOINT YIELDS WITH REDUCED COSTS AND METHODS FOR FORMING THE SAME | Apr 21, 2024 | Pending |
Array
(
[id] => 19364387
[patent_doc_number] => 20240266421
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-08
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/625547
[patent_app_country] => US
[patent_app_date] => 2024-04-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 43721
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18625547
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/625547 | Semiconductor device and method for manufacturing the same | Apr 2, 2024 | Issued |
Array
(
[id] => 20283842
[patent_doc_number] => 20250309084
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-02
[patent_title] => SEMICONDUCTOR PACKAGES WITH COMPACT LEAD DESIGN
[patent_app_type] => utility
[patent_app_number] => 18/622547
[patent_app_country] => US
[patent_app_date] => 2024-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18622547
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/622547 | SEMICONDUCTOR PACKAGES WITH COMPACT LEAD DESIGN | Mar 28, 2024 | Pending |
Array
(
[id] => 19502123
[patent_doc_number] => 20240341141
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-10
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/620890
[patent_app_country] => US
[patent_app_date] => 2024-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20880
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18620890
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/620890 | DISPLAY DEVICE | Mar 27, 2024 | Pending |