Search

Hiwot E. Tefera

Examiner (ID: 11081, Phone: (571)270-3320 , Office: P/3637 )

Most Active Art Unit
3637
Art Unit(s)
3637
Total Applications
908
Issued Applications
632
Pending Applications
82
Abandoned Applications
213

Applications

Application numberTitle of the applicationFiling DateStatus
07/902424 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR Jun 23, 1992 Abandoned
Array ( [id] => 3079925 [patent_doc_number] => 05296734 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-22 [patent_title] => 'Semiconductor integrated circuit having silicon nitride provided as insulator of capacitor' [patent_app_type] => 1 [patent_app_number] => 7/902110 [patent_app_country] => US [patent_app_date] => 1992-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2040 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/296/05296734.pdf [firstpage_image] =>[orig_patent_app_number] => 902110 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/902110
Semiconductor integrated circuit having silicon nitride provided as insulator of capacitor Jun 21, 1992 Issued
Array ( [id] => 3011703 [patent_doc_number] => 05331195 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-07-19 [patent_title] => 'Fuse construction of a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 7/901068 [patent_app_country] => US [patent_app_date] => 1992-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1732 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/331/05331195.pdf [firstpage_image] =>[orig_patent_app_number] => 901068 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/901068
Fuse construction of a semiconductor device Jun 18, 1992 Issued
07/901432 THIN FILM TRANSISTORS AND ACTIVE MATRICES INCLUDING SAME Jun 18, 1992 Abandoned
Array ( [id] => 3040478 [patent_doc_number] => 05300796 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-05 [patent_title] => 'Semiconductor device having an internal cell array region and a peripheral region surrounding the internal cell array for providing input/output basic cells' [patent_app_type] => 1 [patent_app_number] => 7/898363 [patent_app_country] => US [patent_app_date] => 1992-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5064 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/300/05300796.pdf [firstpage_image] =>[orig_patent_app_number] => 898363 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/898363
Semiconductor device having an internal cell array region and a peripheral region surrounding the internal cell array for providing input/output basic cells Jun 3, 1992 Issued
Array ( [id] => 2939873 [patent_doc_number] => 05247201 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-09-21 [patent_title] => 'Input protection structure for integrated circuits' [patent_app_type] => 1 [patent_app_number] => 7/893569 [patent_app_country] => US [patent_app_date] => 1992-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2461 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/247/05247201.pdf [firstpage_image] =>[orig_patent_app_number] => 893569 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/893569
Input protection structure for integrated circuits Jun 2, 1992 Issued
Array ( [id] => 3538006 [patent_doc_number] => 05557136 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-17 [patent_title] => 'Programmable interconnect structures and programmable integrated circuits' [patent_app_type] => 1 [patent_app_number] => 7/892466 [patent_app_country] => US [patent_app_date] => 1992-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8160 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/557/05557136.pdf [firstpage_image] =>[orig_patent_app_number] => 892466 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/892466
Programmable interconnect structures and programmable integrated circuits May 31, 1992 Issued
07/891675 AMORPHOUS SILICON ANTIFUSES AND METHODS FOR FABRICATION THEREOF May 27, 1992 Abandoned
07/890357 AN SOI LATERAL BIPOLAR TRANSISTOR WITH EDGE STRAPPED BASE CONTACT AND METHOD OF FABRICATING SAME May 21, 1992 Abandoned
07/879636 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE COMPRISING A CAPACITOR WITH A FERROELECTRIC DIELECTRIC, AND SEMICONDUCTOR DEVICE COMPRISING SUCH A CAPACITOR May 6, 1992 Abandoned
Array ( [id] => 3097689 [patent_doc_number] => 05291043 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-01 [patent_title] => 'Semiconductor integrated circuit device having gate array' [patent_app_type] => 1 [patent_app_number] => 7/879103 [patent_app_country] => US [patent_app_date] => 1992-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 6410 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/291/05291043.pdf [firstpage_image] =>[orig_patent_app_number] => 879103 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/879103
Semiconductor integrated circuit device having gate array May 3, 1992 Issued
Array ( [id] => 3068281 [patent_doc_number] => 05311036 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-10 [patent_title] => 'Superconducting device' [patent_app_type] => 1 [patent_app_number] => 7/875431 [patent_app_country] => US [patent_app_date] => 1992-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 23 [patent_no_of_words] => 7876 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/311/05311036.pdf [firstpage_image] =>[orig_patent_app_number] => 875431 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/875431
Superconducting device Apr 28, 1992 Issued
Array ( [id] => 3031688 [patent_doc_number] => 05317180 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-31 [patent_title] => 'Vertical DMOS transistor built in an n-well MOS-based BiCMOS process' [patent_app_type] => 1 [patent_app_number] => 7/876689 [patent_app_country] => US [patent_app_date] => 1992-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 24 [patent_no_of_words] => 5581 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/317/05317180.pdf [firstpage_image] =>[orig_patent_app_number] => 876689 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/876689
Vertical DMOS transistor built in an n-well MOS-based BiCMOS process Apr 27, 1992 Issued
07/873239 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND A METHOD OF MANUFACTURING THE SAME Apr 23, 1992 Abandoned
Array ( [id] => 2938775 [patent_doc_number] => 05196724 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-03-23 [patent_title] => 'Programmable interconnect structures and programmable integrated circuits' [patent_app_type] => 1 [patent_app_number] => 7/874983 [patent_app_country] => US [patent_app_date] => 1992-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3989 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/196/05196724.pdf [firstpage_image] =>[orig_patent_app_number] => 874983 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/874983
Programmable interconnect structures and programmable integrated circuits Apr 22, 1992 Issued
07/865410 CIRCUIT MODULE REDUNDANCY ARCHITECTURE Apr 7, 1992 Abandoned
07/863474 SEMICONDUCTOR DEVICE HAVING BI-POLAR-MOS COMPOSITE ELEMENT PELLET SUITABLE FOR PRESSURE CONTACTED STRUCTURE Apr 1, 1992 Abandoned
Array ( [id] => 2884501 [patent_doc_number] => 05185650 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-02-09 [patent_title] => 'High-speed signal transmission line path structure for semiconductor integrated circuit devices' [patent_app_type] => 1 [patent_app_number] => 7/860272 [patent_app_country] => US [patent_app_date] => 1992-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 4633 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/185/05185650.pdf [firstpage_image] =>[orig_patent_app_number] => 860272 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/860272
High-speed signal transmission line path structure for semiconductor integrated circuit devices Mar 31, 1992 Issued
Array ( [id] => 3051839 [patent_doc_number] => 05304839 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-19 [patent_title] => 'Bipolar ESD protection for integrated circuits' [patent_app_type] => 1 [patent_app_number] => 7/847438 [patent_app_country] => US [patent_app_date] => 1992-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2747 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/304/05304839.pdf [firstpage_image] =>[orig_patent_app_number] => 847438 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/847438
Bipolar ESD protection for integrated circuits Mar 5, 1992 Issued
Array ( [id] => 3100191 [patent_doc_number] => 05298774 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-29 [patent_title] => 'Gate array system semiconductor integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 7/844920 [patent_app_country] => US [patent_app_date] => 1992-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 2523 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 327 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/298/05298774.pdf [firstpage_image] =>[orig_patent_app_number] => 844920 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/844920
Gate array system semiconductor integrated circuit device Mar 4, 1992 Issued
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