Search

Hiwot E. Tefera

Examiner (ID: 17470, Phone: (571)270-3320 , Office: P/3637 )

Most Active Art Unit
3637
Art Unit(s)
3637
Total Applications
910
Issued Applications
645
Pending Applications
70
Abandoned Applications
214

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14588087 [patent_doc_number] => 20190221652 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-18 [patent_title] => SEMICONDUCTOR ELECTRONIC DEVICE WITH TRENCH GATE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/247358 [patent_app_country] => US [patent_app_date] => 2019-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3323 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16247358 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/247358
SEMICONDUCTOR ELECTRONIC DEVICE WITH TRENCH GATE AND MANUFACTURING METHOD THEREOF Jan 13, 2019 Abandoned
Array ( [id] => 16638045 [patent_doc_number] => 10916560 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-09 [patent_title] => Crenellated charge storage structures for 3D NAND [patent_app_type] => utility [patent_app_number] => 16/247079 [patent_app_country] => US [patent_app_date] => 2019-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 28 [patent_no_of_words] => 8005 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16247079 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/247079
Crenellated charge storage structures for 3D NAND Jan 13, 2019 Issued
Array ( [id] => 14631473 [patent_doc_number] => 20190229106 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-25 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/247039 [patent_app_country] => US [patent_app_date] => 2019-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5689 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16247039 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/247039
Semiconductor device Jan 13, 2019 Issued
Array ( [id] => 17166482 [patent_doc_number] => 11152595 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-19 [patent_title] => Display device and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/245431 [patent_app_country] => US [patent_app_date] => 2019-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 9364 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16245431 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/245431
Display device and method for manufacturing the same Jan 10, 2019 Issued
Array ( [id] => 16180374 [patent_doc_number] => 20200227343 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => SEMICONDUCTOR DEVICE PACKAGE [patent_app_type] => utility [patent_app_number] => 16/245428 [patent_app_country] => US [patent_app_date] => 2019-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4163 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 308 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16245428 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/245428
SEMICONDUCTOR DEVICE PACKAGE Jan 10, 2019 Abandoned
Array ( [id] => 14317665 [patent_doc_number] => 20190148536 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-16 [patent_title] => SEMICONDUCTOR DEVICE HAVING SUPER JUNCTION METAL OXIDE SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD FOR THE SAME [patent_app_type] => utility [patent_app_number] => 16/245681 [patent_app_country] => US [patent_app_date] => 2019-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4140 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16245681 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/245681
Semiconductor device having super junction metal oxide semiconductor structure and fabrication method for the same Jan 10, 2019 Issued
Array ( [id] => 14317665 [patent_doc_number] => 20190148536 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-16 [patent_title] => SEMICONDUCTOR DEVICE HAVING SUPER JUNCTION METAL OXIDE SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD FOR THE SAME [patent_app_type] => utility [patent_app_number] => 16/245681 [patent_app_country] => US [patent_app_date] => 2019-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4140 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16245681 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/245681
Semiconductor device having super junction metal oxide semiconductor structure and fabrication method for the same Jan 10, 2019 Issued
Array ( [id] => 14317665 [patent_doc_number] => 20190148536 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-16 [patent_title] => SEMICONDUCTOR DEVICE HAVING SUPER JUNCTION METAL OXIDE SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD FOR THE SAME [patent_app_type] => utility [patent_app_number] => 16/245681 [patent_app_country] => US [patent_app_date] => 2019-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4140 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16245681 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/245681
Semiconductor device having super junction metal oxide semiconductor structure and fabrication method for the same Jan 10, 2019 Issued
Array ( [id] => 16959057 [patent_doc_number] => 11062937 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-13 [patent_title] => Dielectric isolation for nanosheet devices [patent_app_type] => utility [patent_app_number] => 16/245285 [patent_app_country] => US [patent_app_date] => 2019-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6192 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16245285 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/245285
Dielectric isolation for nanosheet devices Jan 10, 2019 Issued
Array ( [id] => 16384794 [patent_doc_number] => 10809627 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-20 [patent_title] => Mask, related display device, and related exposure method for manufacturing display device [patent_app_type] => utility [patent_app_number] => 16/245311 [patent_app_country] => US [patent_app_date] => 2019-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 9799 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16245311 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/245311
Mask, related display device, and related exposure method for manufacturing display device Jan 10, 2019 Issued
Array ( [id] => 14317665 [patent_doc_number] => 20190148536 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-16 [patent_title] => SEMICONDUCTOR DEVICE HAVING SUPER JUNCTION METAL OXIDE SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD FOR THE SAME [patent_app_type] => utility [patent_app_number] => 16/245681 [patent_app_country] => US [patent_app_date] => 2019-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4140 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16245681 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/245681
Semiconductor device having super junction metal oxide semiconductor structure and fabrication method for the same Jan 10, 2019 Issued
Array ( [id] => 14587735 [patent_doc_number] => 20190221476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-18 [patent_title] => ELEMENT ISOLATION LAYER STRUCTURE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/244656 [patent_app_country] => US [patent_app_date] => 2019-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5846 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16244656 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/244656
Element isolation layer structure and method of manufacturing the same Jan 9, 2019 Issued
Array ( [id] => 17048161 [patent_doc_number] => 11101351 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-24 [patent_title] => Group III nitride semiconductor device and method of manufacturing group III nitride semiconductor substrate [patent_app_type] => utility [patent_app_number] => 16/245003 [patent_app_country] => US [patent_app_date] => 2019-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 6320 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16245003 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/245003
Group III nitride semiconductor device and method of manufacturing group III nitride semiconductor substrate Jan 9, 2019 Issued
Array ( [id] => 15857767 [patent_doc_number] => 10644185 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Infrared detecting device [patent_app_type] => utility [patent_app_number] => 16/242190 [patent_app_country] => US [patent_app_date] => 2019-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11702 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 304 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16242190 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/242190
Infrared detecting device Jan 7, 2019 Issued
Array ( [id] => 15200231 [patent_doc_number] => 10497617 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-03 [patent_title] => Conductive structure and method for manufacturing conductive structure [patent_app_type] => utility [patent_app_number] => 16/224818 [patent_app_country] => US [patent_app_date] => 2018-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4503 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16224818 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/224818
Conductive structure and method for manufacturing conductive structure Dec 18, 2018 Issued
Array ( [id] => 14446587 [patent_doc_number] => 20190181167 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-13 [patent_title] => BACKSIDE ILLUMINATED IMAGE SENSOR AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/219055 [patent_app_country] => US [patent_app_date] => 2018-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5617 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16219055 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/219055
BACKSIDE ILLUMINATED IMAGE SENSOR AND METHOD OF MANUFACTURING THE SAME Dec 12, 2018 Abandoned
Array ( [id] => 14476423 [patent_doc_number] => 20190189860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-20 [patent_title] => ELECTRONIC CIRCUIT PACKAGE COVER [patent_app_type] => utility [patent_app_number] => 16/218944 [patent_app_country] => US [patent_app_date] => 2018-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3226 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16218944 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/218944
ELECTRONIC CIRCUIT PACKAGE COVER Dec 12, 2018 Abandoned
Array ( [id] => 16479693 [patent_doc_number] => 10854649 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-01 [patent_title] => Image sensor including unit pixel block having common selection transistor [patent_app_type] => utility [patent_app_number] => 16/219049 [patent_app_country] => US [patent_app_date] => 2018-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7240 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16219049 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/219049
Image sensor including unit pixel block having common selection transistor Dec 12, 2018 Issued
Array ( [id] => 14476421 [patent_doc_number] => 20190189859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-20 [patent_title] => COVER FOR AN ELECTRONIC CIRCUIT PACKAGE [patent_app_type] => utility [patent_app_number] => 16/218906 [patent_app_country] => US [patent_app_date] => 2018-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2434 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16218906 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/218906
Cover for an electronic circuit package Dec 12, 2018 Issued
Array ( [id] => 14446707 [patent_doc_number] => 20190181227 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-13 [patent_title] => P-TYPE LATERAL DOUBLE DIFFUSED MOS TRANSISTOR AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/218978 [patent_app_country] => US [patent_app_date] => 2018-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3462 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16218978 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/218978
P-type lateral double diffused MOS transistor and method of manufacturing the same Dec 12, 2018 Issued
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