Search

Hoa B. Trinh

Examiner (ID: 4300, Phone: (571)272-1719 , Office: P/2817 )

Most Active Art Unit
2814
Art Unit(s)
2817, 2813, 2893, 3731, 2814
Total Applications
1769
Issued Applications
1421
Pending Applications
107
Abandoned Applications
243

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8802231 [patent_doc_number] => 08440505 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-14 [patent_title] => 'Semiconductor chips including passivation layer trench structure' [patent_app_type] => utility [patent_app_number] => 12/695515 [patent_app_country] => US [patent_app_date] => 2010-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2228 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12695515 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/695515
Semiconductor chips including passivation layer trench structure Jan 27, 2010 Issued
Array ( [id] => 8802856 [patent_doc_number] => 08441133 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-14 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/695722 [patent_app_country] => US [patent_app_date] => 2010-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3089 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12695722 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/695722
Semiconductor device Jan 27, 2010 Issued
Array ( [id] => 5955898 [patent_doc_number] => 20110180920 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-28 [patent_title] => 'CO-AXIAL RESTRAINT FOR CONNECTORS WITHIN FLIP-CHIP PACKAGES' [patent_app_type] => utility [patent_app_number] => 12/695312 [patent_app_country] => US [patent_app_date] => 2010-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5059 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20110180920.pdf [firstpage_image] =>[orig_patent_app_number] => 12695312 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/695312
Co-axial restraint for connectors within flip-chip packages Jan 27, 2010 Issued
Array ( [id] => 6433327 [patent_doc_number] => 20100187698 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-29 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/694707 [patent_app_country] => US [patent_app_date] => 2010-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5871 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0187/20100187698.pdf [firstpage_image] =>[orig_patent_app_number] => 12694707 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/694707
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME Jan 26, 2010 Abandoned
Array ( [id] => 6197950 [patent_doc_number] => 20110029708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-03 [patent_title] => 'Serial Advanced Technology Attachment Interface Storage Device' [patent_app_type] => utility [patent_app_number] => 12/694564 [patent_app_country] => US [patent_app_date] => 2010-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2006 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20110029708.pdf [firstpage_image] =>[orig_patent_app_number] => 12694564 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/694564
Serial advanced technology attachment interface storage device Jan 26, 2010 Issued
Array ( [id] => 5955900 [patent_doc_number] => 20110180922 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-28 [patent_title] => 'SEMICONDUCTOR CHIP, SEAL-RING STRUCTURE AND MANUFACTURING PROCESS THEREOF' [patent_app_type] => utility [patent_app_number] => 12/694261 [patent_app_country] => US [patent_app_date] => 2010-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2726 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20110180922.pdf [firstpage_image] =>[orig_patent_app_number] => 12694261 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/694261
SEMICONDUCTOR CHIP, SEAL-RING STRUCTURE AND MANUFACTURING PROCESS THEREOF Jan 25, 2010 Abandoned
Array ( [id] => 6311322 [patent_doc_number] => 20100193923 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-05 [patent_title] => 'Semiconductor Device and Manufacturing Method Therefor' [patent_app_type] => utility [patent_app_number] => 12/693984 [patent_app_country] => US [patent_app_date] => 2010-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 16861 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20100193923.pdf [firstpage_image] =>[orig_patent_app_number] => 12693984 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/693984
Semiconductor device and manufacturing method therefor Jan 25, 2010 Issued
Array ( [id] => 7702892 [patent_doc_number] => 08088646 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-01-03 [patent_title] => 'Check valve package for PB-free, single piece electronic modules' [patent_app_type] => utility [patent_app_number] => 12/692383 [patent_app_country] => US [patent_app_date] => 2010-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1466 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/088/08088646.pdf [firstpage_image] =>[orig_patent_app_number] => 12692383 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/692383
Check valve package for PB-free, single piece electronic modules Jan 21, 2010 Issued
Array ( [id] => 8982699 [patent_doc_number] => 08513820 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-20 [patent_title] => 'Package substrate structure and chip package structure and manufacturing process thereof' [patent_app_type] => utility [patent_app_number] => 12/691722 [patent_app_country] => US [patent_app_date] => 2010-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2718 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12691722 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/691722
Package substrate structure and chip package structure and manufacturing process thereof Jan 20, 2010 Issued
Array ( [id] => 7515271 [patent_doc_number] => 08039343 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-18 [patent_title] => 'Scratch protection for direct contact sensors' [patent_app_type] => utility [patent_app_number] => 12/655830 [patent_app_country] => US [patent_app_date] => 2010-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2328 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/039/08039343.pdf [firstpage_image] =>[orig_patent_app_number] => 12655830 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/655830
Scratch protection for direct contact sensors Jan 7, 2010 Issued
Array ( [id] => 6401403 [patent_doc_number] => 20100148415 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-17 [patent_title] => 'Thermal treatment apparatus, method for manufacturing semiconductor device, and method for manufacturing substrate' [patent_app_type] => utility [patent_app_number] => 12/654837 [patent_app_country] => US [patent_app_date] => 2010-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10442 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20100148415.pdf [firstpage_image] =>[orig_patent_app_number] => 12654837 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/654837
Thermal treatment apparatus, method for manufacturing semiconductor device, and method for manufacturing substrate Jan 5, 2010 Abandoned
Array ( [id] => 6422262 [patent_doc_number] => 20100102329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-29 [patent_title] => 'LIGHT-EMITTING DEVICE HAVING LIGHT-EMITTING ELEMENTS WITH A SHARED ELECTRODE' [patent_app_type] => utility [patent_app_number] => 12/652518 [patent_app_country] => US [patent_app_date] => 2010-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 7395 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20100102329.pdf [firstpage_image] =>[orig_patent_app_number] => 12652518 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/652518
Light-emitting device having light-emitting elements with a shared electrode Jan 4, 2010 Issued
Array ( [id] => 6605769 [patent_doc_number] => 20100171214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-08 [patent_title] => 'MARKING METHOD FOR SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE PROVIDED WITH MARKINGS' [patent_app_type] => utility [patent_app_number] => 12/651656 [patent_app_country] => US [patent_app_date] => 2010-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2285 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20100171214.pdf [firstpage_image] =>[orig_patent_app_number] => 12651656 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/651656
Marking method for semiconductor device and semiconductor device provided with markings Jan 3, 2010 Issued
Array ( [id] => 6383795 [patent_doc_number] => 20100176509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-15 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/650654 [patent_app_country] => US [patent_app_date] => 2009-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10046 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20100176509.pdf [firstpage_image] =>[orig_patent_app_number] => 12650654 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/650654
Semiconductor device and method of fabricating the same Dec 30, 2009 Issued
Array ( [id] => 6153726 [patent_doc_number] => 20110156230 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'MULTI-STACKED SEMICONDUCTOR DICE SCALE PACKAGE STRUCTURE AND METHOD OF MANUFACTURING SAME' [patent_app_type] => utility [patent_app_number] => 12/651080 [patent_app_country] => US [patent_app_date] => 2009-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6165 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20110156230.pdf [firstpage_image] =>[orig_patent_app_number] => 12651080 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/651080
Multi-stacked semiconductor dice scale package structure and method of manufacturing same Dec 30, 2009 Issued
Array ( [id] => 8760718 [patent_doc_number] => 08421242 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-16 [patent_title] => 'Semiconductor package' [patent_app_type] => utility [patent_app_number] => 12/651087 [patent_app_country] => US [patent_app_date] => 2009-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 17 [patent_no_of_words] => 2844 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12651087 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/651087
Semiconductor package Dec 30, 2009 Issued
Array ( [id] => 9844976 [patent_doc_number] => 08946896 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-03 [patent_title] => 'Extended liner for localized thick copper interconnect' [patent_app_type] => utility [patent_app_number] => 12/650805 [patent_app_country] => US [patent_app_date] => 2009-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5332 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12650805 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/650805
Extended liner for localized thick copper interconnect Dec 30, 2009 Issued
Array ( [id] => 6295181 [patent_doc_number] => 20100065969 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-18 [patent_title] => 'Integrated circuit device' [patent_app_type] => utility [patent_app_number] => 12/591532 [patent_app_country] => US [patent_app_date] => 2009-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2158 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0065/20100065969.pdf [firstpage_image] =>[orig_patent_app_number] => 12591532 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/591532
Integrated circuit device Nov 22, 2009 Issued
Array ( [id] => 6587744 [patent_doc_number] => 20100048017 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-25 [patent_title] => 'BONDED STRUCTURE AND BONDING METHOD' [patent_app_type] => utility [patent_app_number] => 12/614170 [patent_app_country] => US [patent_app_date] => 2009-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3884 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0048/20100048017.pdf [firstpage_image] =>[orig_patent_app_number] => 12614170 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/614170
Bonded structure and bonding method Nov 5, 2009 Issued
Array ( [id] => 9254510 [patent_doc_number] => 08617924 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-31 [patent_title] => 'Stacked integrated circuit package-in-package system and method of manufacture thereof' [patent_app_type] => utility [patent_app_number] => 12/612603 [patent_app_country] => US [patent_app_date] => 2009-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 5067 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12612603 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/612603
Stacked integrated circuit package-in-package system and method of manufacture thereof Nov 3, 2009 Issued
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