Search

Hoa B. Trinh

Examiner (ID: 4300, Phone: (571)272-1719 , Office: P/2817 )

Most Active Art Unit
2814
Art Unit(s)
2817, 2813, 2893, 3731, 2814
Total Applications
1769
Issued Applications
1421
Pending Applications
107
Abandoned Applications
243

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5364736 [patent_doc_number] => 20090302295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-10 [patent_title] => 'Structures & Methods for Combining Carbon Nanotube Array and Organic Materials as a Variable Gap Interposer for Removing Heat from Solid-State Devices' [patent_app_type] => utility [patent_app_number] => 12/365377 [patent_app_country] => US [patent_app_date] => 2009-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3155 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20090302295.pdf [firstpage_image] =>[orig_patent_app_number] => 12365377 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/365377
Structures & Methods for Combining Carbon Nanotube Array and Organic Materials as a Variable Gap Interposer for Removing Heat from Solid-State Devices Feb 3, 2009 Abandoned
Array ( [id] => 6393358 [patent_doc_number] => 20100164085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-01 [patent_title] => 'MULTI-DIE BUILDING BLOCK FOR STACKED-DIE PACKAGE' [patent_app_type] => utility [patent_app_number] => 12/347738 [patent_app_country] => US [patent_app_date] => 2008-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3483 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20100164085.pdf [firstpage_image] =>[orig_patent_app_number] => 12347738 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/347738
Multi-die building block for stacked-die package Dec 30, 2008 Issued
Array ( [id] => 7762183 [patent_doc_number] => 08114768 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-14 [patent_title] => 'Electromigration resistant via-to-line interconnect' [patent_app_type] => utility [patent_app_number] => 12/344838 [patent_app_country] => US [patent_app_date] => 2008-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 29 [patent_no_of_words] => 10051 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/114/08114768.pdf [firstpage_image] =>[orig_patent_app_number] => 12344838 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/344838
Electromigration resistant via-to-line interconnect Dec 28, 2008 Issued
Array ( [id] => 8802230 [patent_doc_number] => 08440504 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-14 [patent_title] => 'Method for aligning and bonding elements and a device comprising aligned and bonded elements' [patent_app_type] => utility [patent_app_number] => 12/864871 [patent_app_country] => US [patent_app_date] => 2008-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 7095 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12864871 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/864871
Method for aligning and bonding elements and a device comprising aligned and bonded elements Dec 28, 2008 Issued
Array ( [id] => 5499356 [patent_doc_number] => 20090160044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-25 [patent_title] => 'SEMICONDUCTOR MODULE MOUNTING STRUCTURE' [patent_app_type] => utility [patent_app_number] => 12/343597 [patent_app_country] => US [patent_app_date] => 2008-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5167 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20090160044.pdf [firstpage_image] =>[orig_patent_app_number] => 12343597 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/343597
SEMICONDUCTOR MODULE MOUNTING STRUCTURE Dec 23, 2008 Abandoned
Array ( [id] => 6280616 [patent_doc_number] => 20100155934 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-24 [patent_title] => 'MOLDING COMPOUND INCLUDING A CARBON NANO-TUBE DISPERSION' [patent_app_type] => utility [patent_app_number] => 12/343398 [patent_app_country] => US [patent_app_date] => 2008-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2967 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20100155934.pdf [firstpage_image] =>[orig_patent_app_number] => 12343398 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/343398
Molding compound including a carbon nano-tube dispersion Dec 22, 2008 Issued
Array ( [id] => 6280129 [patent_doc_number] => 20100155774 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-24 [patent_title] => 'BI-DIRECTIONAL TRANSIENT VOLTAGE SUPPRESSION DEVICE AND FORMING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/342118 [patent_app_country] => US [patent_app_date] => 2008-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3878 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20100155774.pdf [firstpage_image] =>[orig_patent_app_number] => 12342118 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/342118
Bi-directional transient voltage suppression device and forming method thereof Dec 22, 2008 Issued
Array ( [id] => 9247289 [patent_doc_number] => 08611582 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-17 [patent_title] => 'Single piece earloop with corresponding pivot post' [patent_app_type] => utility [patent_app_number] => 12/339936 [patent_app_country] => US [patent_app_date] => 2008-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1853 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12339936 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/339936
Single piece earloop with corresponding pivot post Dec 18, 2008 Issued
Array ( [id] => 5401413 [patent_doc_number] => 20090236726 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-24 [patent_title] => 'PACKAGE-ON-PACKAGE SEMICONDUCTOR STRUCTURE' [patent_app_type] => utility [patent_app_number] => 12/333328 [patent_app_country] => US [patent_app_date] => 2008-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5035 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0236/20090236726.pdf [firstpage_image] =>[orig_patent_app_number] => 12333328 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/333328
PACKAGE-ON-PACKAGE SEMICONDUCTOR STRUCTURE Dec 11, 2008 Abandoned
Array ( [id] => 6400960 [patent_doc_number] => 20100148344 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-17 [patent_title] => 'INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INPUT/OUTPUT EXPANSION' [patent_app_type] => utility [patent_app_number] => 12/333298 [patent_app_country] => US [patent_app_date] => 2008-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6853 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20100148344.pdf [firstpage_image] =>[orig_patent_app_number] => 12333298 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/333298
Integrated circuit package system with input/output expansion Dec 10, 2008 Issued
Array ( [id] => 6410252 [patent_doc_number] => 20100140751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-10 [patent_title] => 'Semiconductor Device and Method of Forming a Conductive Via-in-Via Structure' [patent_app_type] => utility [patent_app_number] => 12/332318 [patent_app_country] => US [patent_app_date] => 2008-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6794 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20100140751.pdf [firstpage_image] =>[orig_patent_app_number] => 12332318 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/332318
Semiconductor device and method of forming a conductive via-in-via structure Dec 9, 2008 Issued
Array ( [id] => 6549936 [patent_doc_number] => 20100127394 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-27 [patent_title] => 'THROUGH SUBSTRATE VIAS FOR BACK-SIDE INTERCONNECTIONS ON VERY THIN SEMICONDUCTOR WAFERS' [patent_app_type] => utility [patent_app_number] => 12/277512 [patent_app_country] => US [patent_app_date] => 2008-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6847 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20100127394.pdf [firstpage_image] =>[orig_patent_app_number] => 12277512 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/277512
Through substrate vias for back-side interconnections on very thin semiconductor wafers Nov 24, 2008 Issued
Array ( [id] => 7988943 [patent_doc_number] => 08076769 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-13 [patent_title] => 'Semiconductor device and manufacturing method of semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/275848 [patent_app_country] => US [patent_app_date] => 2008-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 70 [patent_figures_cnt] => 70 [patent_no_of_words] => 18519 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/076/08076769.pdf [firstpage_image] =>[orig_patent_app_number] => 12275848 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/275848
Semiconductor device and manufacturing method of semiconductor device Nov 20, 2008 Issued
Array ( [id] => 6278646 [patent_doc_number] => 20100119100 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-13 [patent_title] => 'Electronic voice pad and utility ear device' [patent_app_type] => utility [patent_app_number] => 12/291800 [patent_app_country] => US [patent_app_date] => 2008-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3756 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20100119100.pdf [firstpage_image] =>[orig_patent_app_number] => 12291800 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/291800
Electronic voice pad and utility ear device Nov 12, 2008 Abandoned
Array ( [id] => 6272167 [patent_doc_number] => 20100117202 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-13 [patent_title] => 'MOLD AND SUBSTRATE FOR USE WITH MOLD' [patent_app_type] => utility [patent_app_number] => 12/269058 [patent_app_country] => US [patent_app_date] => 2008-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3251 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20100117202.pdf [firstpage_image] =>[orig_patent_app_number] => 12269058 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/269058
Mold and substrate for use with mold Nov 11, 2008 Issued
Array ( [id] => 4634329 [patent_doc_number] => 08012778 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-06 [patent_title] => 'LED package and fabricating method thereof' [patent_app_type] => utility [patent_app_number] => 12/259576 [patent_app_country] => US [patent_app_date] => 2008-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4158 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/012/08012778.pdf [firstpage_image] =>[orig_patent_app_number] => 12259576 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/259576
LED package and fabricating method thereof Oct 27, 2008 Issued
Array ( [id] => 5578730 [patent_doc_number] => 20090174076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-09 [patent_title] => 'SEMICONDUCTOR DEVICE AND THE METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/243477 [patent_app_country] => US [patent_app_date] => 2008-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4082 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20090174076.pdf [firstpage_image] =>[orig_patent_app_number] => 12243477 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/243477
Semiconductor device and the method of manufacturing the same Sep 30, 2008 Issued
Array ( [id] => 6358748 [patent_doc_number] => 20100078778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-01 [patent_title] => 'On-Chip RF Shields with Front Side Redistribution Lines' [patent_app_type] => utility [patent_app_number] => 12/242688 [patent_app_country] => US [patent_app_date] => 2008-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 7317 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20100078778.pdf [firstpage_image] =>[orig_patent_app_number] => 12242688 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/242688
On-chip RF shields with front side redistribution lines Sep 29, 2008 Issued
Array ( [id] => 9250724 [patent_doc_number] => 08614506 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-12-24 [patent_title] => 'RFID tags with bumped substrate, and apparatuses and methods for making' [patent_app_type] => utility [patent_app_number] => 12/238349 [patent_app_country] => US [patent_app_date] => 2008-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 22 [patent_no_of_words] => 5587 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12238349 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/238349
RFID tags with bumped substrate, and apparatuses and methods for making Sep 24, 2008 Issued
Array ( [id] => 5268982 [patent_doc_number] => 20090072757 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-19 [patent_title] => 'METHOD OF DRIVING A LIGHT EMITTING DEVICE' [patent_app_type] => utility [patent_app_number] => 12/238035 [patent_app_country] => US [patent_app_date] => 2008-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9703 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20090072757.pdf [firstpage_image] =>[orig_patent_app_number] => 12238035 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/238035
Method of driving a light emitting device Sep 24, 2008 Issued
Menu