
Hoa B. Trinh
Examiner (ID: 4300, Phone: (571)272-1719 , Office: P/2817 )
| Most Active Art Unit | 2814 |
| Art Unit(s) | 2817, 2813, 2893, 3731, 2814 |
| Total Applications | 1769 |
| Issued Applications | 1421 |
| Pending Applications | 107 |
| Abandoned Applications | 243 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 585783
[patent_doc_number] => 07449720
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-11-11
[patent_title] => 'Epitaxial wafer for semiconductor light-emitting devices, and semiconductor light-emitting device'
[patent_app_type] => utility
[patent_app_number] => 11/105589
[patent_app_country] => US
[patent_app_date] => 2005-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4461
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/449/07449720.pdf
[firstpage_image] =>[orig_patent_app_number] => 11105589
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/105589 | Epitaxial wafer for semiconductor light-emitting devices, and semiconductor light-emitting device | Apr 13, 2005 | Issued |
Array
(
[id] => 810539
[patent_doc_number] => 07417296
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-08-26
[patent_title] => 'Dielectric isolation type semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/104478
[patent_app_country] => US
[patent_app_date] => 2005-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 21
[patent_no_of_words] => 12332
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[patent_maintenance] => 1
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[pdf_file] => patents/07/417/07417296.pdf
[firstpage_image] =>[orig_patent_app_number] => 11104478
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/104478 | Dielectric isolation type semiconductor device | Apr 12, 2005 | Issued |
Array
(
[id] => 6942627
[patent_doc_number] => 20050194675
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-09-08
[patent_title] => 'Capacitor-related systems for addressing package/motherboard resonance'
[patent_app_type] => utility
[patent_app_number] => 11/103939
[patent_app_country] => US
[patent_app_date] => 2005-04-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
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[patent_no_of_words] => 3280
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[pdf_file] => publications/A1/0194/20050194675.pdf
[firstpage_image] =>[orig_patent_app_number] => 11103939
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/103939 | Capacitor-related systems for addressing package/motherboard resonance | Apr 11, 2005 | Issued |
Array
(
[id] => 168172
[patent_doc_number] => 07666734
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-02-23
[patent_title] => 'Semiconductor device having a fuse'
[patent_app_type] => utility
[patent_app_number] => 11/085863
[patent_app_country] => US
[patent_app_date] => 2005-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 24
[patent_no_of_words] => 3313
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 212
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/666/07666734.pdf
[firstpage_image] =>[orig_patent_app_number] => 11085863
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/085863 | Semiconductor device having a fuse | Mar 21, 2005 | Issued |
Array
(
[id] => 6942644
[patent_doc_number] => 20050194692
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-09-08
[patent_title] => 'Guard ring of a combination wafer or singulated die'
[patent_app_type] => utility
[patent_app_number] => 11/086187
[patent_app_country] => US
[patent_app_date] => 2005-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2408
[patent_no_of_claims] => 15
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[pdf_file] => publications/A1/0194/20050194692.pdf
[firstpage_image] =>[orig_patent_app_number] => 11086187
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/086187 | Guard ring of a combination wafer or singulated die | Mar 20, 2005 | Issued |
Array
(
[id] => 7036776
[patent_doc_number] => 20050156210
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-07-21
[patent_title] => 'Methods of forming reacted conductive gate electrodes'
[patent_app_type] => utility
[patent_app_number] => 11/073976
[patent_app_country] => US
[patent_app_date] => 2005-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 5245
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[pdf_file] => publications/A1/0156/20050156210.pdf
[firstpage_image] =>[orig_patent_app_number] => 11073976
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/073976 | Methods of forming reacted conductive gate electrodes | Mar 6, 2005 | Issued |
Array
(
[id] => 7072598
[patent_doc_number] => 20050145864
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-07-07
[patent_title] => 'Semiconductor light-emitting element and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/054409
[patent_app_country] => US
[patent_app_date] => 2005-02-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[patent_no_of_words] => 7160
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[pdf_file] => publications/A1/0145/20050145864.pdf
[firstpage_image] =>[orig_patent_app_number] => 11054409
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/054409 | Semiconductor light-emitting element and method of manufacturing the same | Feb 9, 2005 | Abandoned |
Array
(
[id] => 7073106
[patent_doc_number] => 20050146372
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-07-07
[patent_title] => 'Method of driving a dual gated MOSFET'
[patent_app_type] => utility
[patent_app_number] => 11/052264
[patent_app_country] => US
[patent_app_date] => 2005-02-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 2857
[patent_no_of_claims] => 14
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[pdf_file] => publications/A1/0146/20050146372.pdf
[firstpage_image] =>[orig_patent_app_number] => 11052264
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/052264 | Method of driving a dual gated MOSFET | Feb 6, 2005 | Issued |
Array
(
[id] => 795852
[patent_doc_number] => 07429768
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-09-30
[patent_title] => 'Semiconductor device having a trench surrounding each of plural unit cells'
[patent_app_type] => utility
[patent_app_number] => 11/018499
[patent_app_country] => US
[patent_app_date] => 2004-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
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[patent_no_of_words] => 4522
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[pdf_file] => patents/07/429/07429768.pdf
[firstpage_image] =>[orig_patent_app_number] => 11018499
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/018499 | Semiconductor device having a trench surrounding each of plural unit cells | Dec 21, 2004 | Issued |
Array
(
[id] => 239524
[patent_doc_number] => 07592241
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-09-22
[patent_title] => 'Semiconductor device having well with peak impurity concentrations and method for fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 11/017859
[patent_app_country] => US
[patent_app_date] => 2004-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[patent_no_of_words] => 6991
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[pdf_file] => patents/07/592/07592241.pdf
[firstpage_image] =>[orig_patent_app_number] => 11017859
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/017859 | Semiconductor device having well with peak impurity concentrations and method for fabricating the same | Dec 21, 2004 | Issued |
Array
(
[id] => 6903401
[patent_doc_number] => 20050098796
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-12
[patent_title] => 'Methods and apparatus for a semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/011729
[patent_app_country] => US
[patent_app_date] => 2004-12-14
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0098/20050098796.pdf
[firstpage_image] =>[orig_patent_app_number] => 11011729
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/011729 | Methods and apparatus for a semiconductor device | Dec 13, 2004 | Issued |
Array
(
[id] => 7605454
[patent_doc_number] => 07115475
[patent_country] => US
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[patent_issue_date] => 2006-10-03
[patent_title] => 'Method of manufacturing semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/002638
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[pdf_file] => patents/07/115/07115475.pdf
[firstpage_image] =>[orig_patent_app_number] => 11002638
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/002638 | Method of manufacturing semiconductor device | Dec 2, 2004 | Issued |
Array
(
[id] => 773417
[patent_doc_number] => 07001807
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-02-21
[patent_title] => 'Fully isolated dielectric memory cell structure for a dual bit nitride storage device and process for making same'
[patent_app_type] => utility
[patent_app_number] => 10/997345
[patent_app_country] => US
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[pdf_file] => patents/07/001/07001807.pdf
[firstpage_image] =>[orig_patent_app_number] => 10997345
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/997345 | Fully isolated dielectric memory cell structure for a dual bit nitride storage device and process for making same | Nov 23, 2004 | Issued |
Array
(
[id] => 675711
[patent_doc_number] => 07087464
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[patent_kind] => B2
[patent_issue_date] => 2006-08-08
[patent_title] => 'Method and structure for a wafer level packaging'
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[patent_app_number] => 10/986104
[patent_app_country] => US
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[pdf_file] => patents/07/087/07087464.pdf
[firstpage_image] =>[orig_patent_app_number] => 10986104
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/986104 | Method and structure for a wafer level packaging | Nov 11, 2004 | Issued |
Array
(
[id] => 5805209
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[patent_country] => US
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[patent_issue_date] => 2006-05-04
[patent_title] => 'Flip chip BGA process and package with stiffener ring'
[patent_app_type] => utility
[patent_app_number] => 10/978008
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/978008 | Flip chip BGA process and package with stiffener ring | Oct 28, 2004 | Abandoned |
Array
(
[id] => 803616
[patent_doc_number] => 07423321
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-09-09
[patent_title] => 'Double gate MOSFET device'
[patent_app_type] => utility
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[pdf_file] => patents/07/423/07423321.pdf
[firstpage_image] =>[orig_patent_app_number] => 10976278
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/976278 | Double gate MOSFET device | Oct 28, 2004 | Issued |
Array
(
[id] => 6915443
[patent_doc_number] => 20050093004
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-05
[patent_title] => 'Thin film light emitting diode'
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[firstpage_image] =>[orig_patent_app_number] => 10975095
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/975095 | Thin film light emitting diode | Oct 27, 2004 | Issued |
Array
(
[id] => 5741288
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[patent_title] => 'IC substrate and manufacturing method thereof and semiconductor element package thereby'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/972689 | Heat spreader and semiconductor device package having the same | Oct 24, 2004 | Abandoned |
Array
(
[id] => 436214
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[firstpage_image] =>[orig_patent_app_number] => 10970158
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/970158 | Semiconductor device having stress and its manufacture method | Oct 21, 2004 | Issued |