Search

Hoa B. Trinh

Examiner (ID: 4300, Phone: (571)272-1719 , Office: P/2817 )

Most Active Art Unit
2814
Art Unit(s)
2817, 2813, 2893, 3731, 2814
Total Applications
1769
Issued Applications
1421
Pending Applications
107
Abandoned Applications
243

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7086590 [patent_doc_number] => 20050006702 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'Semiconductor integrated circuit, semiconductor device, and semiconductor device fabrication method' [patent_app_type] => utility [patent_app_number] => 10/747149 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5445 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20050006702.pdf [firstpage_image] =>[orig_patent_app_number] => 10747149 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/747149
Semiconductor device with an enhancement type field effect transistor in which threshold voltage is dependent upon substrate bias voltage Dec 29, 2003 Issued
Array ( [id] => 7260474 [patent_doc_number] => 20040150116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-05 [patent_title] => 'Thermal enhance MCM package' [patent_app_type] => new [patent_app_number] => 10/747038 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1546 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0150/20040150116.pdf [firstpage_image] =>[orig_patent_app_number] => 10747038 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/747038
Thermal enhance MCM package Dec 29, 2003 Issued
Array ( [id] => 756439 [patent_doc_number] => 07019407 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-28 [patent_title] => 'Flip chip package structure' [patent_app_type] => utility [patent_app_number] => 10/707609 [patent_app_country] => US [patent_app_date] => 2003-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 4166 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/019/07019407.pdf [firstpage_image] =>[orig_patent_app_number] => 10707609 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/707609
Flip chip package structure Dec 23, 2003 Issued
Array ( [id] => 504538 [patent_doc_number] => 07202115 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-10 [patent_title] => 'Thin film transistor, its manufacture method and display device' [patent_app_type] => utility [patent_app_number] => 10/745419 [patent_app_country] => US [patent_app_date] => 2003-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 17 [patent_no_of_words] => 5227 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/202/07202115.pdf [firstpage_image] =>[orig_patent_app_number] => 10745419 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/745419
Thin film transistor, its manufacture method and display device Dec 21, 2003 Issued
Array ( [id] => 659688 [patent_doc_number] => 07105913 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-12 [patent_title] => 'Two-layer patterned resistor' [patent_app_type] => utility [patent_app_number] => 10/743589 [patent_app_country] => US [patent_app_date] => 2003-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 5189 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/105/07105913.pdf [firstpage_image] =>[orig_patent_app_number] => 10743589 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/743589
Two-layer patterned resistor Dec 21, 2003 Issued
Array ( [id] => 975975 [patent_doc_number] => 06933592 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-23 [patent_title] => 'Substrate structure capable of reducing package singular stress' [patent_app_type] => utility [patent_app_number] => 10/739168 [patent_app_country] => US [patent_app_date] => 2003-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1212 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/933/06933592.pdf [firstpage_image] =>[orig_patent_app_number] => 10739168 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/739168
Substrate structure capable of reducing package singular stress Dec 18, 2003 Issued
Array ( [id] => 7295847 [patent_doc_number] => 20040124443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-01 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => new [patent_app_number] => 10/735759 [patent_app_country] => US [patent_app_date] => 2003-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6169 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20040124443.pdf [firstpage_image] =>[orig_patent_app_number] => 10735759 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/735759
Semiconductor device and manufacturing method thereof Dec 15, 2003 Abandoned
Array ( [id] => 896170 [patent_doc_number] => 07342254 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-11 [patent_title] => 'Light-emitting device having a diffractive film on its light-output face and manufacturing method therefor' [patent_app_type] => utility [patent_app_number] => 10/506258 [patent_app_country] => US [patent_app_date] => 2003-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 5708 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/342/07342254.pdf [firstpage_image] =>[orig_patent_app_number] => 10506258 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/506258
Light-emitting device having a diffractive film on its light-output face and manufacturing method therefor Dec 3, 2003 Issued
Array ( [id] => 935665 [patent_doc_number] => 06975015 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-13 [patent_title] => 'Modulated trigger device' [patent_app_type] => utility [patent_app_number] => 10/707289 [patent_app_country] => US [patent_app_date] => 2003-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 26 [patent_no_of_words] => 4457 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/975/06975015.pdf [firstpage_image] =>[orig_patent_app_number] => 10707289 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/707289
Modulated trigger device Dec 2, 2003 Issued
Array ( [id] => 803632 [patent_doc_number] => 07423337 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-09-09 [patent_title] => 'Integrated circuit device package having a support coating for improved reliability during temperature cycling' [patent_app_type] => utility [patent_app_number] => 10/707208 [patent_app_country] => US [patent_app_date] => 2003-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 5080 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/423/07423337.pdf [firstpage_image] =>[orig_patent_app_number] => 10707208 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/707208
Integrated circuit device package having a support coating for improved reliability during temperature cycling Nov 25, 2003 Issued
Array ( [id] => 7101352 [patent_doc_number] => 20050104078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-19 [patent_title] => 'Light-emitting diode having chemical compound based reflective structure' [patent_app_type] => utility [patent_app_number] => 10/705929 [patent_app_country] => US [patent_app_date] => 2003-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2829 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20050104078.pdf [firstpage_image] =>[orig_patent_app_number] => 10705929 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/705929
Light-emitting diode having chemical compound based reflective structure Nov 12, 2003 Abandoned
Array ( [id] => 7198889 [patent_doc_number] => 20050051897 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-10 [patent_title] => 'Bonding pad design for impedance matching improvement' [patent_app_type] => utility [patent_app_number] => 10/705978 [patent_app_country] => US [patent_app_date] => 2003-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3024 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20050051897.pdf [firstpage_image] =>[orig_patent_app_number] => 10705978 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/705978
Bonding pad design for impedance matching improvement Nov 12, 2003 Issued
Array ( [id] => 495917 [patent_doc_number] => 07211879 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-05-01 [patent_title] => 'Semiconductor package with chamfered corners and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 10/706468 [patent_app_country] => US [patent_app_date] => 2003-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 5704 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/211/07211879.pdf [firstpage_image] =>[orig_patent_app_number] => 10706468 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/706468
Semiconductor package with chamfered corners and method of manufacturing the same Nov 11, 2003 Issued
Array ( [id] => 7466951 [patent_doc_number] => 20040102037 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-27 [patent_title] => 'Semiconductor device production method and semiconductor device' [patent_app_type] => new [patent_app_number] => 10/704608 [patent_app_country] => US [patent_app_date] => 2003-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 22612 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20040102037.pdf [firstpage_image] =>[orig_patent_app_number] => 10704608 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/704608
Semiconductor device production method Nov 11, 2003 Issued
Array ( [id] => 7286510 [patent_doc_number] => 20040108578 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-10 [patent_title] => 'Leadframe and method for manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/702549 [patent_app_country] => US [patent_app_date] => 2003-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2967 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20040108578.pdf [firstpage_image] =>[orig_patent_app_number] => 10702549 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/702549
Leadframe and method for manufacturing the same Nov 6, 2003 Abandoned
Array ( [id] => 7030803 [patent_doc_number] => 20050029525 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-10 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/704089 [patent_app_country] => US [patent_app_date] => 2003-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3869 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20050029525.pdf [firstpage_image] =>[orig_patent_app_number] => 10704089 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/704089
Semiconductor device and method for fabricating the same Nov 6, 2003 Issued
Array ( [id] => 390610 [patent_doc_number] => 07301206 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-27 [patent_title] => 'Semiconductor-on-insulator SRAM configured using partially-depleted and fully-depleted transistors' [patent_app_type] => utility [patent_app_number] => 10/700869 [patent_app_country] => US [patent_app_date] => 2003-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 7512 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/301/07301206.pdf [firstpage_image] =>[orig_patent_app_number] => 10700869 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/700869
Semiconductor-on-insulator SRAM configured using partially-depleted and fully-depleted transistors Nov 3, 2003 Issued
Array ( [id] => 7354058 [patent_doc_number] => 20040089958 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-13 [patent_title] => 'Conductor wafer and substrate' [patent_app_type] => new [patent_app_number] => 10/698468 [patent_app_country] => US [patent_app_date] => 2003-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1276 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20040089958.pdf [firstpage_image] =>[orig_patent_app_number] => 10698468 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/698468
Conductor wafer and substrate Nov 2, 2003 Abandoned
Array ( [id] => 7323346 [patent_doc_number] => 20040251472 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-16 [patent_title] => 'Memory cell for modification of revision identifier in an integrated circuit chip' [patent_app_type] => new [patent_app_number] => 10/697079 [patent_app_country] => US [patent_app_date] => 2003-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 7344 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 10697079 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/697079
Memory cell for modification of revision identifier in an integrated circuit chip Oct 30, 2003 Abandoned
Array ( [id] => 6969734 [patent_doc_number] => 20050035444 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-17 [patent_title] => 'Multi-chip package device with heat sink and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 10/696198 [patent_app_country] => US [patent_app_date] => 2003-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3687 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0035/20050035444.pdf [firstpage_image] =>[orig_patent_app_number] => 10696198 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/696198
Multi-chip package device with heat sink and fabrication method thereof Oct 27, 2003 Abandoned
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