Hoa B. Trinh

Array ( [id] => 5787391 [patent_doc_number] => 20020160553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-31 [patent_title] => 'Method and apparatus for forming a thin semiconductor film, method and apparatus for producing a semiconductor device, and electro-opitcal apparatus' [patent_app_type] => new [patent_app_number] => 10/075774 [patent_app_country] => US [patent_app_date] => 2002-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 41115 [patent_no_of_claims] => 66 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20020160553.pdf [firstpage_image] =>[orig_patent_app_number] => 10075774 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7612882 [patent_doc_number] => 06902952 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-07 [patent_title] => 'Multi-part lead frame with dissimilar materials and method of manufacturing' [patent_app_type] => utility [patent_app_number] => 10/076849 [patent_app_country] => US [patent_app_date] => 2002-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 6419 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/902/06902952.pdf [firstpage_image] =>[orig_patent_app_number] => 10076849 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6269550 [patent_doc_number] => 20020105041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-08 [patent_title] => 'Integrated circuit device with switching between active mode and standby mode controlled by digital circuit' [patent_app_type] => new [patent_app_number] => 10/073103 [patent_app_country] => US [patent_app_date] => 2002-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 12129 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20020105041.pdf [firstpage_image] =>[orig_patent_app_number] => 10073103 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5787494 [patent_doc_number] => 20020160618 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-31 [patent_title] => 'Method for patterning an organic antireflection layer' [patent_app_type] => new [patent_app_number] => 10/073554 [patent_app_country] => US [patent_app_date] => 2002-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1889 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20020160618.pdf [firstpage_image] =>[orig_patent_app_number] => 10073554 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5922100 [patent_doc_number] => 20020115295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-22 [patent_title] => 'Process of manufacturing semiconductor device' [patent_app_type] => new [patent_app_number] => 10/062543 [patent_app_country] => US [patent_app_date] => 2002-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4035 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20020115295.pdf [firstpage_image] =>[orig_patent_app_number] => 10062543 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1424227 [patent_doc_number] => 06515329 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-02-04 [patent_title] => 'Flash memory device and method of making same' [patent_app_type] => B2 [patent_app_number] => 10/068483 [patent_app_country] => US [patent_app_date] => 2002-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 32 [patent_no_of_words] => 5100 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/515/06515329.pdf [firstpage_image] =>[orig_patent_app_number] => 10068483 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1165474 [patent_doc_number] => 06756294 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-29 [patent_title] => 'Method for improving bump reliability for flip chip devices' [patent_app_type] => B1 [patent_app_number] => 10/060483 [patent_app_country] => US [patent_app_date] => 2002-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 4658 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/756/06756294.pdf [firstpage_image] =>[orig_patent_app_number] => 10060483 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 142606 [patent_doc_number] => 07687839 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-30 [patent_title] => 'Scratch protection for direct contact sensors' [patent_app_type] => utility [patent_app_number] => 10/059982 [patent_app_country] => US [patent_app_date] => 2002-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2308 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/687/07687839.pdf [firstpage_image] =>[orig_patent_app_number] => 10059982 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1146823 [patent_doc_number] => 06774055 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-10 [patent_title] => 'In-line system having overlay accuracy measurement function and method for the same' [patent_app_type] => B2 [patent_app_number] => 10/059483 [patent_app_country] => US [patent_app_date] => 2002-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2582 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/774/06774055.pdf [firstpage_image] =>[orig_patent_app_number] => 10059483 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1241537 [patent_doc_number] => 06683360 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-27 [patent_title] => 'Multiple or graded epitaxial wafers for particle or radiation detection' [patent_app_type] => B1 [patent_app_number] => 10/056573 [patent_app_country] => US [patent_app_date] => 2002-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 6391 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/683/06683360.pdf [firstpage_image] =>[orig_patent_app_number] => 10056573 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1031550 [patent_doc_number] => 06879051 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-04-12 [patent_title] => 'Systems and methods to determine seed layer thickness of trench sidewalls' [patent_app_type] => utility [patent_app_number] => 10/050454 [patent_app_country] => US [patent_app_date] => 2002-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6432 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/879/06879051.pdf [firstpage_image] =>[orig_patent_app_number] => 10050454 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6694858 [patent_doc_number] => 20030107052 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-12 [patent_title] => 'Structure and method for fabricating a semiconductor device' [patent_app_type] => new [patent_app_number] => 10/047719 [patent_app_country] => US [patent_app_date] => 2002-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2402 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20030107052.pdf [firstpage_image] =>[orig_patent_app_number] => 10047719 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1205463 [patent_doc_number] => 06716680 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-06 [patent_title] => 'Process for manufacturing reflective TFT-LCD with rough diffuser' [patent_app_type] => B2 [patent_app_number] => 10/040484 [patent_app_country] => US [patent_app_date] => 2002-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 2903 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/716/06716680.pdf [firstpage_image] =>[orig_patent_app_number] => 10040484 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5858686 [patent_doc_number] => 20020122894 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-05 [patent_title] => 'Separating wafers coated with plastic films' [patent_app_type] => new [patent_app_number] => 10/038813 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2701 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20020122894.pdf [firstpage_image] =>[orig_patent_app_number] => 10038813 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1177273 [patent_doc_number] => 06743691 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-01 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => B2 [patent_app_number] => 10/026613 [patent_app_country] => US [patent_app_date] => 2001-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 22 [patent_no_of_words] => 8080 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/743/06743691.pdf [firstpage_image] =>[orig_patent_app_number] => 10026613 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1231351 [patent_doc_number] => 06693012 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-17 [patent_title] => 'Method and device to reduce gate-induced drain leakage (GIDL) current in thin gate oxide MOSFETs' [patent_app_type] => B2 [patent_app_number] => 10/034778 [patent_app_country] => US [patent_app_date] => 2001-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 4551 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/693/06693012.pdf [firstpage_image] =>[orig_patent_app_number] => 10034778 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1415330 [patent_doc_number] => 06511886 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-01-28 [patent_title] => 'Method for manufacturing trench-gate type power semiconductor device' [patent_app_type] => B2 [patent_app_number] => 10/032629 [patent_app_country] => US [patent_app_date] => 2001-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2059 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 348 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/511/06511886.pdf [firstpage_image] =>[orig_patent_app_number] => 10032629 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1130501 [patent_doc_number] => 06787455 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-07 [patent_title] => 'Bi-layer photoresist method for forming high resolution semiconductor features' [patent_app_type] => B2 [patent_app_number] => 10/032353 [patent_app_country] => US [patent_app_date] => 2001-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 8 [patent_no_of_words] => 3383 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/787/06787455.pdf [firstpage_image] =>[orig_patent_app_number] => 10032353 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1209398 [patent_doc_number] => 06713386 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-30 [patent_title] => 'Method of preventing resist poisoning in dual damascene structures' [patent_app_type] => B1 [patent_app_number] => 10/025304 [patent_app_country] => US [patent_app_date] => 2001-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 4084 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/713/06713386.pdf [firstpage_image] =>[orig_patent_app_number] => 10025304 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6666750 [patent_doc_number] => 20030111733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-19 [patent_title] => 'CHIP AND WAFER INTEGRATION PROCESS USING VERTICAL CONNECTIONS' [patent_app_type] => new [patent_app_number] => 10/026103 [patent_app_country] => US [patent_app_date] => 2001-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 3591 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0111/20030111733.pdf [firstpage_image] =>[orig_patent_app_number] => 10026103 [rel_patent_id] =>[rel_patent_doc_number] =>)