Search

Hoa Cao Nguyen

Examiner (ID: 286, Phone: (571)272-8293 , Office: P/2847 )

Most Active Art Unit
2847
Art Unit(s)
2841, 2835, 2847
Total Applications
1364
Issued Applications
1099
Pending Applications
12
Abandoned Applications
265

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13670951 [patent_doc_number] => 10165674 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-12-25 [patent_title] => Circuit board and electromagnetic bandgap structure thereof [patent_app_type] => utility [patent_app_number] => 15/862542 [patent_app_country] => US [patent_app_date] => 2018-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2902 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15862542 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/862542
Circuit board and electromagnetic bandgap structure thereof Jan 3, 2018 Issued
Array ( [id] => 14401717 [patent_doc_number] => 10314171 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-06-04 [patent_title] => Package assembly with hermetic cavity [patent_app_type] => utility [patent_app_number] => 15/859321 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 27 [patent_no_of_words] => 15593 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859321 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859321
Package assembly with hermetic cavity Dec 28, 2017 Issued
Array ( [id] => 12699283 [patent_doc_number] => 20180124927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-03 [patent_title] => CONTACT STRUCTURES WITH POROUS NETWORKS FOR SOLDER CONNECTIONS, AND METHODS OF FABRICATING SAME [patent_app_type] => utility [patent_app_number] => 15/858791 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7459 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15858791 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/858791
Contact structures with porous networks for solder connections, and methods of fabricating same Dec 28, 2017 Issued
Array ( [id] => 13772823 [patent_doc_number] => 10178770 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-01-08 [patent_title] => Higher density multi-component and serial packages [patent_app_type] => utility [patent_app_number] => 15/852799 [patent_app_country] => US [patent_app_date] => 2017-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 29 [patent_no_of_words] => 8105 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15852799 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/852799
Higher density multi-component and serial packages Dec 21, 2017 Issued
Array ( [id] => 14513595 [patent_doc_number] => 20190200452 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-27 [patent_title] => CIRCUIT BOARD ASSEMBLIES AND METHODS OF ASSEMBLING CIRCUIT BOARDS AND BUS BARS [patent_app_type] => utility [patent_app_number] => 15/851195 [patent_app_country] => US [patent_app_date] => 2017-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3444 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15851195 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/851195
Circuit board assemblies and methods of assembling circuit boards and bus bars Dec 20, 2017 Issued
Array ( [id] => 12721567 [patent_doc_number] => 20180132356 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-10 [patent_title] => METHOD FOR MANUFACTURING CAPACITOR BUILT-IN SUBSTRATE [patent_app_type] => utility [patent_app_number] => 15/846492 [patent_app_country] => US [patent_app_date] => 2017-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8758 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15846492 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/846492
METHOD FOR MANUFACTURING CAPACITOR BUILT-IN SUBSTRATE Dec 18, 2017 Abandoned
Array ( [id] => 17152590 [patent_doc_number] => 11145681 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-12 [patent_title] => Display panel and display device applying the same [patent_app_type] => utility [patent_app_number] => 16/758127 [patent_app_country] => US [patent_app_date] => 2017-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5204 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16758127 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/758127
Display panel and display device applying the same Dec 12, 2017 Issued
Array ( [id] => 13131703 [patent_doc_number] => 10083790 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-09-25 [patent_title] => Method and apparatus for attaching magnetic components to printed circuit boards [patent_app_type] => utility [patent_app_number] => 15/832861 [patent_app_country] => US [patent_app_date] => 2017-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 4476 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 286 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15832861 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/832861
Method and apparatus for attaching magnetic components to printed circuit boards Dec 5, 2017 Issued
Array ( [id] => 13954017 [patent_doc_number] => 10212807 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-19 [patent_title] => Electrical interface for package and die [patent_app_type] => utility [patent_app_number] => 15/826424 [patent_app_country] => US [patent_app_date] => 2017-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 5923 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15826424 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/826424
Electrical interface for package and die Nov 28, 2017 Issued
Array ( [id] => 13123829 [patent_doc_number] => 10080284 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-18 [patent_title] => Circuit board structure [patent_app_type] => utility [patent_app_number] => 15/822222 [patent_app_country] => US [patent_app_date] => 2017-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 5721 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15822222 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/822222
Circuit board structure Nov 26, 2017 Issued
Array ( [id] => 14433471 [patent_doc_number] => 10321564 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-11 [patent_title] => Solder assembly of pins to the peripheral end face of a printed circuit board [patent_app_type] => utility [patent_app_number] => 15/808786 [patent_app_country] => US [patent_app_date] => 2017-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5671 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 332 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15808786 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/808786
Solder assembly of pins to the peripheral end face of a printed circuit board Nov 8, 2017 Issued
Array ( [id] => 16187002 [patent_doc_number] => 10720338 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-07-21 [patent_title] => Low temperature cofired ceramic substrates and fabrication techniques for the same [patent_app_type] => utility [patent_app_number] => 15/805352 [patent_app_country] => US [patent_app_date] => 2017-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3365 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15805352 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/805352
Low temperature cofired ceramic substrates and fabrication techniques for the same Nov 6, 2017 Issued
Array ( [id] => 12237587 [patent_doc_number] => 20180070450 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-08 [patent_title] => 'PRINTED CIRCUIT BOARD AND A METHOD FOR PRODUCING A PRINTED CIRCUIT BOARD' [patent_app_type] => utility [patent_app_number] => 15/797542 [patent_app_country] => US [patent_app_date] => 2017-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2475 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15797542 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/797542
Printed circuit board and a method for producing a printed circuit board Oct 29, 2017 Issued
Array ( [id] => 13423129 [patent_doc_number] => 20180263107 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-13 [patent_title] => SHIELDING MOLD FOR ELECTRIC AND MAGNETIC EMI MITIGATION [patent_app_type] => utility [patent_app_number] => 15/797761 [patent_app_country] => US [patent_app_date] => 2017-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3997 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15797761 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/797761
SHIELDING MOLD FOR ELECTRIC AND MAGNETIC EMI MITIGATION Oct 29, 2017 Abandoned
Array ( [id] => 12237598 [patent_doc_number] => 20180070462 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-08 [patent_title] => 'HIGH VOLTAGE POWER MODULE' [patent_app_type] => utility [patent_app_number] => 15/796138 [patent_app_country] => US [patent_app_date] => 2017-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5798 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15796138 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/796138
High voltage power module Oct 26, 2017 Issued
Array ( [id] => 13954021 [patent_doc_number] => 10212809 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-19 [patent_title] => Flexible printed circuit boards and related methods [patent_app_type] => utility [patent_app_number] => 15/782269 [patent_app_country] => US [patent_app_date] => 2017-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 8689 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15782269 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/782269
Flexible printed circuit boards and related methods Oct 11, 2017 Issued
Array ( [id] => 12183171 [patent_doc_number] => 20180042107 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-08 [patent_title] => 'MULTILAYER SUBSTRATE AND ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 15/726501 [patent_app_country] => US [patent_app_date] => 2017-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6798 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15726501 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/726501
Multilayer substrate and electronic device Oct 5, 2017 Issued
Array ( [id] => 13367085 [patent_doc_number] => 20180235083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-16 [patent_title] => CIRCUIT BOARD [patent_app_type] => utility [patent_app_number] => 15/721968 [patent_app_country] => US [patent_app_date] => 2017-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4380 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15721968 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/721968
Circuit board Oct 1, 2017 Issued
Array ( [id] => 12601176 [patent_doc_number] => 20180092222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-29 [patent_title] => SIMULTANEOUS AND SELECTIVE WIDE GAP PARTITIONING OF VIA STRUCTURES USING PLATING RESIST [patent_app_type] => utility [patent_app_number] => 15/723135 [patent_app_country] => US [patent_app_date] => 2017-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14555 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15723135 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/723135
Simultaneous and selective wide gap partitioning of via structures using plating resist Oct 1, 2017 Issued
Array ( [id] => 16595710 [patent_doc_number] => 10905002 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-26 [patent_title] => Method for forming flexible substrate including via, and flexible substrate having via [patent_app_type] => utility [patent_app_number] => 16/476784 [patent_app_country] => US [patent_app_date] => 2017-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3448 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16476784 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/476784
Method for forming flexible substrate including via, and flexible substrate having via Sep 21, 2017 Issued
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