
Hoa Cao Nguyen
Examiner (ID: 6850, Phone: (571)272-8293 , Office: P/2847 )
| Most Active Art Unit | 2847 |
| Art Unit(s) | 2835, 2841, 2847 |
| Total Applications | 1364 |
| Issued Applications | 1099 |
| Pending Applications | 12 |
| Abandoned Applications | 265 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7450829
[patent_doc_number] => 20040196642
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-10-07
[patent_title] => 'Transceiver module with PCB having embedded traces for EMI control'
[patent_app_type] => new
[patent_app_number] => 10/831600
[patent_app_country] => US
[patent_app_date] => 2004-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 6519
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0196/20040196642.pdf
[firstpage_image] =>[orig_patent_app_number] => 10831600
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/831600 | Transceiver module with PCB having embedded traces for EMI control | Apr 22, 2004 | Issued |
Array
(
[id] => 6938777
[patent_doc_number] => 20050112340
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-26
[patent_title] => 'Bonding structure with buffer layer and method of forming the same'
[patent_app_type] => utility
[patent_app_number] => 10/829060
[patent_app_country] => US
[patent_app_date] => 2004-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 3295
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0112/20050112340.pdf
[firstpage_image] =>[orig_patent_app_number] => 10829060
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/829060 | Bonding structure with buffer layer and method of forming the same | Apr 19, 2004 | Issued |
Array
(
[id] => 6950861
[patent_doc_number] => 20050225955
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-13
[patent_title] => 'Multi-layer printed circuit boards'
[patent_app_type] => utility
[patent_app_number] => 10/821458
[patent_app_country] => US
[patent_app_date] => 2004-04-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4550
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0225/20050225955.pdf
[firstpage_image] =>[orig_patent_app_number] => 10821458
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/821458 | Multi-layer printed circuit boards | Apr 8, 2004 | Abandoned |
Array
(
[id] => 7220081
[patent_doc_number] => 20050254222
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-11-17
[patent_title] => 'Hard disk drive interface device for industrial computers'
[patent_app_type] => utility
[patent_app_number] => 10/815696
[patent_app_country] => US
[patent_app_date] => 2004-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1674
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0254/20050254222.pdf
[firstpage_image] =>[orig_patent_app_number] => 10815696
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/815696 | Hard disk drive interface device for industrial computers | Apr 1, 2004 | Abandoned |
Array
(
[id] => 7375616
[patent_doc_number] => 20040178492
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-16
[patent_title] => 'Multi-layer wiring board, IC package, and method of manufacturing multi-layer wiring board'
[patent_app_type] => new
[patent_app_number] => 10/808502
[patent_app_country] => US
[patent_app_date] => 2004-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 19355
[patent_no_of_claims] => 51
[patent_no_of_ind_claims] => 12
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0178/20040178492.pdf
[firstpage_image] =>[orig_patent_app_number] => 10808502
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/808502 | Multi-layer wiring board, IC package, and method of manufacturing multi-layer wiring board | Mar 24, 2004 | Abandoned |
Array
(
[id] => 7107760
[patent_doc_number] => 20050205292
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-09-22
[patent_title] => 'Circuit and method for broadband switching noise suppression in multilayer printed circuit boards using localized lattice structures'
[patent_app_type] => utility
[patent_app_number] => 10/803311
[patent_app_country] => US
[patent_app_date] => 2004-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 9730
[patent_no_of_claims] => 59
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0205/20050205292.pdf
[firstpage_image] =>[orig_patent_app_number] => 10803311
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/803311 | Circuit and method for broadband switching noise suppression in multilayer printed circuit boards using localized lattice structures | Mar 17, 2004 | Abandoned |
Array
(
[id] => 7390728
[patent_doc_number] => 20040173377
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-09
[patent_title] => 'Carrier foil for electronic components, for laminating inside chip cards'
[patent_app_type] => new
[patent_app_number] => 10/474357
[patent_app_country] => US
[patent_app_date] => 2004-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 2049
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 21
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0173/20040173377.pdf
[firstpage_image] =>[orig_patent_app_number] => 10474357
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/474357 | Carrier foil for electronic components, for laminating inside chip cards | Mar 16, 2004 | Abandoned |
Array
(
[id] => 7230982
[patent_doc_number] => 20040256150
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-23
[patent_title] => 'Nonconducting substrate, forming a strip or a panel, on which a multiplicity of carrier elements are formed'
[patent_app_type] => new
[patent_app_number] => 10/803174
[patent_app_country] => US
[patent_app_date] => 2004-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5669
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0256/20040256150.pdf
[firstpage_image] =>[orig_patent_app_number] => 10803174
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/803174 | Nonconducting substrate, forming a strip or a panel, on which a multiplicity of carrier elements are formed | Mar 15, 2004 | Abandoned |
Array
(
[id] => 7160596
[patent_doc_number] => 20050199422
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-09-15
[patent_title] => 'Maximizing capacitance per unit area while minimizing signal transmission delay in PCB'
[patent_app_type] => utility
[patent_app_number] => 10/798389
[patent_app_country] => US
[patent_app_date] => 2004-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2532
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0199/20050199422.pdf
[firstpage_image] =>[orig_patent_app_number] => 10798389
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/798389 | Maximizing capacitance per unit area while minimizing signal transmission delay in PCB | Mar 11, 2004 | Issued |
Array
(
[id] => 7264285
[patent_doc_number] => 20040242086
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-02
[patent_title] => 'Bus bar structure plate and producing method of circuit structure body by using of the same'
[patent_app_type] => new
[patent_app_number] => 10/796983
[patent_app_country] => US
[patent_app_date] => 2004-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 5438
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0242/20040242086.pdf
[firstpage_image] =>[orig_patent_app_number] => 10796983
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/796983 | Bus bar structure plate and producing method of circuit structure body by using of the same | Mar 10, 2004 | Issued |
Array
(
[id] => 7164907
[patent_doc_number] => 20050201068
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-09-15
[patent_title] => 'Replaceable LED module'
[patent_app_type] => utility
[patent_app_number] => 10/798752
[patent_app_country] => US
[patent_app_date] => 2004-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1688
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0201/20050201068.pdf
[firstpage_image] =>[orig_patent_app_number] => 10798752
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/798752 | Replaceable LED module | Mar 9, 2004 | Abandoned |
Array
(
[id] => 454386
[patent_doc_number] => 07248138
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-07-24
[patent_title] => 'Multi-layer printed circuit board inductor winding with added metal foil layers'
[patent_app_type] => utility
[patent_app_number] => 10/796694
[patent_app_country] => US
[patent_app_date] => 2004-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 21
[patent_no_of_words] => 5585
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/248/07248138.pdf
[firstpage_image] =>[orig_patent_app_number] => 10796694
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/796694 | Multi-layer printed circuit board inductor winding with added metal foil layers | Mar 7, 2004 | Issued |
Array
(
[id] => 6942131
[patent_doc_number] => 20050194179
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-09-08
[patent_title] => 'Method for reducing voltage drop across metal lines of electroluminescence display devices'
[patent_app_type] => utility
[patent_app_number] => 10/794008
[patent_app_country] => US
[patent_app_date] => 2004-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2737
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0194/20050194179.pdf
[firstpage_image] =>[orig_patent_app_number] => 10794008
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/794008 | Method for reducing voltage drop across metal lines of electroluminescence display devices | Mar 3, 2004 | Issued |
Array
(
[id] => 6943536
[patent_doc_number] => 20050195585
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-09-08
[patent_title] => 'Circuitized substrate with signal wire shielding, electrical assembly utilizing same and method of making'
[patent_app_type] => utility
[patent_app_number] => 10/790747
[patent_app_country] => US
[patent_app_date] => 2004-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4888
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0195/20050195585.pdf
[firstpage_image] =>[orig_patent_app_number] => 10790747
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/790747 | Circuitized substrate with signal wire shielding, electrical assembly utilizing same and method of making | Mar 2, 2004 | Issued |
Array
(
[id] => 588851
[patent_doc_number] => 07453700
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-11-18
[patent_title] => 'Display device'
[patent_app_type] => utility
[patent_app_number] => 10/554077
[patent_app_country] => US
[patent_app_date] => 2004-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
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[patent_no_of_words] => 10901
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/453/07453700.pdf
[firstpage_image] =>[orig_patent_app_number] => 10554077
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/554077 | Display device | Feb 19, 2004 | Issued |
Array
(
[id] => 7272434
[patent_doc_number] => 20040231885
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-11-25
[patent_title] => 'Printed wiring boards having capacitors and methods of making thereof'
[patent_app_type] => new
[patent_app_number] => 10/725888
[patent_app_country] => US
[patent_app_date] => 2004-02-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 13057
[patent_no_of_claims] => 30
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[patent_words_short_claim] => 82
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0231/20040231885.pdf
[firstpage_image] =>[orig_patent_app_number] => 10725888
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/725888 | Printed wiring boards having capacitors and methods of making thereof | Feb 3, 2004 | Abandoned |
Array
(
[id] => 7225169
[patent_doc_number] => 20040156177
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-08-12
[patent_title] => 'Package of electronic components and method for producing the same'
[patent_app_type] => new
[patent_app_number] => 10/770775
[patent_app_country] => US
[patent_app_date] => 2004-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
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[patent_no_of_words] => 9845
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0156/20040156177.pdf
[firstpage_image] =>[orig_patent_app_number] => 10770775
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/770775 | Package of electronic components and method for producing the same | Feb 2, 2004 | Abandoned |
Array
(
[id] => 5812105
[patent_doc_number] => 20060082979
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-04-20
[patent_title] => 'Installation device and installation assembly comprising said installation device'
[patent_app_type] => utility
[patent_app_number] => 10/545376
[patent_app_country] => US
[patent_app_date] => 2004-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
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[pdf_file] => publications/A1/0082/20060082979.pdf
[firstpage_image] =>[orig_patent_app_number] => 10545376
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/545376 | Installation device and installation assembly comprising said installation device | Jan 28, 2004 | Abandoned |
Array
(
[id] => 7374365
[patent_doc_number] => 20040178250
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-16
[patent_title] => 'Oriented connections for leadless and leaded packages'
[patent_app_type] => new
[patent_app_number] => 10/765772
[patent_app_country] => US
[patent_app_date] => 2004-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 93
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[patent_no_of_words] => 24179
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0178/20040178250.pdf
[firstpage_image] =>[orig_patent_app_number] => 10765772
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/765772 | Oriented connections for leadless and leaded packages | Jan 25, 2004 | Issued |
Array
(
[id] => 7188515
[patent_doc_number] => 20050162839
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-07-28
[patent_title] => 'Shared via decoupling for area arrays components'
[patent_app_type] => utility
[patent_app_number] => 10/761343
[patent_app_country] => US
[patent_app_date] => 2004-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4642
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0162/20050162839.pdf
[firstpage_image] =>[orig_patent_app_number] => 10761343
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/761343 | Shared via decoupling for area arrays components | Jan 21, 2004 | Issued |