Search

Hoa Van Le

Examiner (ID: 13440, Phone: (571)272-1332 , Office: P/1721 )

Most Active Art Unit
1752
Art Unit(s)
1105, 1113, 1507, 1506, 1721, 1724, 1737, 1752, 1795
Total Applications
3483
Issued Applications
2664
Pending Applications
54
Abandoned Applications
766

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4047873 [patent_doc_number] => 05995419 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Repairable memory cell for a memory cell array' [patent_app_type] => 1 [patent_app_number] => 9/212140 [patent_app_country] => US [patent_app_date] => 1998-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5987 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/995/05995419.pdf [firstpage_image] =>[orig_patent_app_number] => 212140 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/212140
Repairable memory cell for a memory cell array Dec 14, 1998 Issued
Array ( [id] => 4170124 [patent_doc_number] => 06157562 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-05 [patent_title] => 'ROM with four-phase dynamic circuits' [patent_app_type] => 1 [patent_app_number] => 9/209760 [patent_app_country] => US [patent_app_date] => 1998-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3556 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/157/06157562.pdf [firstpage_image] =>[orig_patent_app_number] => 209760 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/209760
ROM with four-phase dynamic circuits Dec 10, 1998 Issued
Array ( [id] => 4169976 [patent_doc_number] => 06108245 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Write recovery time control circuit in semiconductor memory and control method thereof' [patent_app_type] => 1 [patent_app_number] => 9/207260 [patent_app_country] => US [patent_app_date] => 1998-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3381 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/108/06108245.pdf [firstpage_image] =>[orig_patent_app_number] => 207260 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/207260
Write recovery time control circuit in semiconductor memory and control method thereof Dec 8, 1998 Issued
Array ( [id] => 4193736 [patent_doc_number] => 06021061 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-01 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/208055 [patent_app_country] => US [patent_app_date] => 1998-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 4904 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/021/06021061.pdf [firstpage_image] =>[orig_patent_app_number] => 208055 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/208055
Semiconductor memory device Dec 8, 1998 Issued
Array ( [id] => 4363517 [patent_doc_number] => 06169307 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-02 [patent_title] => 'Nonvolatile semiconductor memory device comprising a memory transistor, a select transistor, and an intermediate diffusion layer' [patent_app_type] => 1 [patent_app_number] => 9/206560 [patent_app_country] => US [patent_app_date] => 1998-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 48 [patent_no_of_words] => 22053 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/169/06169307.pdf [firstpage_image] =>[orig_patent_app_number] => 206560 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/206560
Nonvolatile semiconductor memory device comprising a memory transistor, a select transistor, and an intermediate diffusion layer Dec 7, 1998 Issued
Array ( [id] => 3962349 [patent_doc_number] => 05999462 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'Clock generation circuit for analog value memory circuit' [patent_app_type] => 1 [patent_app_number] => 9/205200 [patent_app_country] => US [patent_app_date] => 1998-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 9263 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/999/05999462.pdf [firstpage_image] =>[orig_patent_app_number] => 205200 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/205200
Clock generation circuit for analog value memory circuit Dec 3, 1998 Issued
Array ( [id] => 4047720 [patent_doc_number] => 05995408 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Nonvolatile ferroelectric memory with folded bit line architecture' [patent_app_type] => 1 [patent_app_number] => 9/201522 [patent_app_country] => US [patent_app_date] => 1998-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 26 [patent_no_of_words] => 3093 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/995/05995408.pdf [firstpage_image] =>[orig_patent_app_number] => 201522 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/201522
Nonvolatile ferroelectric memory with folded bit line architecture Nov 29, 1998 Issued
Array ( [id] => 4169948 [patent_doc_number] => 06104630 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-15 [patent_title] => 'Semiconductor storage device having spare and dummy word lines' [patent_app_type] => 1 [patent_app_number] => 9/197764 [patent_app_country] => US [patent_app_date] => 1998-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 56 [patent_no_of_words] => 20138 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/104/06104630.pdf [firstpage_image] =>[orig_patent_app_number] => 197764 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/197764
Semiconductor storage device having spare and dummy word lines Nov 22, 1998 Issued
Array ( [id] => 4191951 [patent_doc_number] => 06038174 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-14 [patent_title] => 'Precision programming of nonvolatile memory cells' [patent_app_type] => 1 [patent_app_number] => 9/197479 [patent_app_country] => US [patent_app_date] => 1998-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 8071 [patent_no_of_claims] => 70 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/038/06038174.pdf [firstpage_image] =>[orig_patent_app_number] => 197479 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/197479
Precision programming of nonvolatile memory cells Nov 19, 1998 Issued
Array ( [id] => 4250491 [patent_doc_number] => 06144589 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-07 [patent_title] => 'Boosting circuit, particularly for a memory device' [patent_app_type] => 1 [patent_app_number] => 9/186758 [patent_app_country] => US [patent_app_date] => 1998-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4371 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/144/06144589.pdf [firstpage_image] =>[orig_patent_app_number] => 186758 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/186758
Boosting circuit, particularly for a memory device Nov 4, 1998 Issued
Array ( [id] => 4139898 [patent_doc_number] => 06128207 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-03 [patent_title] => 'Low-power content addressable memory cell' [patent_app_type] => 1 [patent_app_number] => 9/185057 [patent_app_country] => US [patent_app_date] => 1998-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 9100 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/128/06128207.pdf [firstpage_image] =>[orig_patent_app_number] => 185057 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/185057
Low-power content addressable memory cell Nov 1, 1998 Issued
Array ( [id] => 4131286 [patent_doc_number] => 06072730 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-06 [patent_title] => 'Low power differential signal transition techniques for use in memory devices' [patent_app_type] => 1 [patent_app_number] => 9/177859 [patent_app_country] => US [patent_app_date] => 1998-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3282 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/072/06072730.pdf [firstpage_image] =>[orig_patent_app_number] => 177859 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/177859
Low power differential signal transition techniques for use in memory devices Oct 22, 1998 Issued
Array ( [id] => 4202151 [patent_doc_number] => 06130845 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'Dynamic type semiconductor memory device having function of compensating for threshold value' [patent_app_type] => 1 [patent_app_number] => 9/161954 [patent_app_country] => US [patent_app_date] => 1998-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 8120 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/130/06130845.pdf [firstpage_image] =>[orig_patent_app_number] => 161954 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/161954
Dynamic type semiconductor memory device having function of compensating for threshold value Sep 28, 1998 Issued
Array ( [id] => 4078306 [patent_doc_number] => 06009037 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-28 [patent_title] => 'Dynamic logic memory addressing circuits, systems, and methods with reduced capacitively loaded predecoders' [patent_app_type] => 1 [patent_app_number] => 9/160270 [patent_app_country] => US [patent_app_date] => 1998-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 20164 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 592 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/009/06009037.pdf [firstpage_image] =>[orig_patent_app_number] => 160270 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/160270
Dynamic logic memory addressing circuits, systems, and methods with reduced capacitively loaded predecoders Sep 23, 1998 Issued
Array ( [id] => 4145147 [patent_doc_number] => 06147894 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-14 [patent_title] => 'Method and apparatus for storing data using spin-polarized electrons' [patent_app_type] => 1 [patent_app_number] => 9/157368 [patent_app_country] => US [patent_app_date] => 1998-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 8998 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/147/06147894.pdf [firstpage_image] =>[orig_patent_app_number] => 157368 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/157368
Method and apparatus for storing data using spin-polarized electrons Sep 20, 1998 Issued
Array ( [id] => 4110533 [patent_doc_number] => 06067244 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-23 [patent_title] => 'Ferroelectric dynamic random access memory' [patent_app_type] => 1 [patent_app_number] => 9/154056 [patent_app_country] => US [patent_app_date] => 1998-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 21 [patent_no_of_words] => 4927 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/067/06067244.pdf [firstpage_image] =>[orig_patent_app_number] => 154056 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/154056
Ferroelectric dynamic random access memory Sep 15, 1998 Issued
Array ( [id] => 4229695 [patent_doc_number] => 06111784 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-29 [patent_title] => 'Magnetic thin film memory element utilizing GMR effect, and recording/reproduction method using such memory element' [patent_app_type] => 1 [patent_app_number] => 9/154859 [patent_app_country] => US [patent_app_date] => 1998-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 29 [patent_no_of_words] => 12098 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/111/06111784.pdf [firstpage_image] =>[orig_patent_app_number] => 154859 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/154859
Magnetic thin film memory element utilizing GMR effect, and recording/reproduction method using such memory element Sep 15, 1998 Issued
Array ( [id] => 4169866 [patent_doc_number] => 06108238 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Programmable semiconductor memory device having program voltages and verify voltages' [patent_app_type] => 1 [patent_app_number] => 9/152069 [patent_app_country] => US [patent_app_date] => 1998-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 88 [patent_no_of_words] => 22209 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 17 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/108/06108238.pdf [firstpage_image] =>[orig_patent_app_number] => 152069 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/152069
Programmable semiconductor memory device having program voltages and verify voltages Sep 10, 1998 Issued
Array ( [id] => 4140118 [patent_doc_number] => 06128221 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-03 [patent_title] => 'Circuit and programming method for the operation of flash memories to prevent programming disturbances' [patent_app_type] => 1 [patent_app_number] => 9/150666 [patent_app_country] => US [patent_app_date] => 1998-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2205 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/128/06128221.pdf [firstpage_image] =>[orig_patent_app_number] => 150666 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/150666
Circuit and programming method for the operation of flash memories to prevent programming disturbances Sep 9, 1998 Issued
Array ( [id] => 4082526 [patent_doc_number] => 06069830 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-30 [patent_title] => 'Circuit and method for sensing memory cell having multiple threshold voltages' [patent_app_type] => 1 [patent_app_number] => 9/146664 [patent_app_country] => US [patent_app_date] => 1998-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2978 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/069/06069830.pdf [firstpage_image] =>[orig_patent_app_number] => 146664 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/146664
Circuit and method for sensing memory cell having multiple threshold voltages Sep 2, 1998 Issued
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