Search

Hoa Van Le

Examiner (ID: 13074)

Most Active Art Unit
1752
Art Unit(s)
1752, 1795, 1113, 1737, 1507, 1724, 1105, 1506, 1721
Total Applications
3483
Issued Applications
2665
Pending Applications
54
Abandoned Applications
766

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1116617 [patent_doc_number] => 06804761 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-10-12 [patent_title] => 'Memory allocation system and method' [patent_app_type] => B1 [patent_app_number] => 09/489553 [patent_app_country] => US [patent_app_date] => 2000-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3445 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/804/06804761.pdf [firstpage_image] =>[orig_patent_app_number] => 09489553 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/489553
Memory allocation system and method Jan 20, 2000 Issued
Array ( [id] => 1411457 [patent_doc_number] => 06553454 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-22 [patent_title] => 'Storage device and method of reordering commands from a command queue' [patent_app_type] => B1 [patent_app_number] => 09/488510 [patent_app_country] => US [patent_app_date] => 2000-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 8592 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/553/06553454.pdf [firstpage_image] =>[orig_patent_app_number] => 09488510 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/488510
Storage device and method of reordering commands from a command queue Jan 19, 2000 Issued
Array ( [id] => 1376878 [patent_doc_number] => 06578110 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-10 [patent_title] => 'High-speed processor system and cache memories with processing capabilities' [patent_app_type] => B1 [patent_app_number] => 09/488405 [patent_app_country] => US [patent_app_date] => 2000-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3686 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/578/06578110.pdf [firstpage_image] =>[orig_patent_app_number] => 09488405 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/488405
High-speed processor system and cache memories with processing capabilities Jan 19, 2000 Issued
Array ( [id] => 4292257 [patent_doc_number] => 06247100 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-12 [patent_title] => 'Method and system for transmitting address commands in a multiprocessor system' [patent_app_type] => 1 [patent_app_number] => 9/479750 [patent_app_country] => US [patent_app_date] => 2000-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2754 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/247/06247100.pdf [firstpage_image] =>[orig_patent_app_number] => 479750 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/479750
Method and system for transmitting address commands in a multiprocessor system Jan 6, 2000 Issued
Array ( [id] => 1567490 [patent_doc_number] => 06363471 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Mechanism for handling 16-bit addressing in a processor' [patent_app_type] => B1 [patent_app_number] => 09/476323 [patent_app_country] => US [patent_app_date] => 2000-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11819 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/363/06363471.pdf [firstpage_image] =>[orig_patent_app_number] => 09476323 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/476323
Mechanism for handling 16-bit addressing in a processor Jan 2, 2000 Issued
Array ( [id] => 1339400 [patent_doc_number] => 06601158 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-29 [patent_title] => 'Count/address generation circuitry' [patent_app_type] => B1 [patent_app_number] => 09/475647 [patent_app_country] => US [patent_app_date] => 1999-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6511 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/601/06601158.pdf [firstpage_image] =>[orig_patent_app_number] => 09475647 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/475647
Count/address generation circuitry Dec 29, 1999 Issued
Array ( [id] => 1484958 [patent_doc_number] => 06453384 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-17 [patent_title] => 'Spare area management method of optical recording medium' [patent_app_type] => B1 [patent_app_number] => 09/443319 [patent_app_country] => US [patent_app_date] => 1999-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 4725 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/453/06453384.pdf [firstpage_image] =>[orig_patent_app_number] => 09443319 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/443319
Spare area management method of optical recording medium Nov 18, 1999 Issued
Array ( [id] => 1602000 [patent_doc_number] => 06385701 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'Method, system and program products for sharing data between varied clients using token management' [patent_app_type] => B1 [patent_app_number] => 09/443727 [patent_app_country] => US [patent_app_date] => 1999-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 11650 [patent_no_of_claims] => 97 [patent_no_of_ind_claims] => 19 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/385/06385701.pdf [firstpage_image] =>[orig_patent_app_number] => 09443727 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/443727
Method, system and program products for sharing data between varied clients using token management Nov 18, 1999 Issued
Array ( [id] => 1572386 [patent_doc_number] => 06378049 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-23 [patent_title] => 'Universal memory controller' [patent_app_type] => B1 [patent_app_number] => 09/439254 [patent_app_country] => US [patent_app_date] => 1999-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 34 [patent_no_of_words] => 15328 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/378/06378049.pdf [firstpage_image] =>[orig_patent_app_number] => 09439254 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/439254
Universal memory controller Nov 11, 1999 Issued
Array ( [id] => 1166017 [patent_doc_number] => 06772302 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-03 [patent_title] => 'Virtual copy method for data spanning storage boundaries' [patent_app_type] => B1 [patent_app_number] => 09/439899 [patent_app_country] => US [patent_app_date] => 1999-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4069 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/772/06772302.pdf [firstpage_image] =>[orig_patent_app_number] => 09439899 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/439899
Virtual copy method for data spanning storage boundaries Nov 11, 1999 Issued
Array ( [id] => 1481773 [patent_doc_number] => 06345351 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-05 [patent_title] => 'Maintenance of speculative state of parallel executed jobs in an information processing system' [patent_app_type] => B1 [patent_app_number] => 09/438325 [patent_app_country] => US [patent_app_date] => 1999-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11636 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/345/06345351.pdf [firstpage_image] =>[orig_patent_app_number] => 09438325 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/438325
Maintenance of speculative state of parallel executed jobs in an information processing system Nov 11, 1999 Issued
Array ( [id] => 1602004 [patent_doc_number] => 06385702 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'High performance multiprocessor system with exclusive-deallocate cache state' [patent_app_type] => B1 [patent_app_number] => 09/437198 [patent_app_country] => US [patent_app_date] => 1999-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5442 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/385/06385702.pdf [firstpage_image] =>[orig_patent_app_number] => 09437198 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/437198
High performance multiprocessor system with exclusive-deallocate cache state Nov 8, 1999 Issued
Array ( [id] => 6134045 [patent_doc_number] => 20020078319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-20 [patent_title] => 'DIGITAL SIGNAL PROCESSOR WITH DIRECT AND VIRTUAL ADDRESSING' [patent_app_type] => new [patent_app_number] => 09/434606 [patent_app_country] => US [patent_app_date] => 1999-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2760 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20020078319.pdf [firstpage_image] =>[orig_patent_app_number] => 09434606 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/434606
Digital signal processor with direct and virtual addressing Nov 4, 1999 Issued
Array ( [id] => 1552839 [patent_doc_number] => 06446162 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'Storage system' [patent_app_type] => B1 [patent_app_number] => 09/428774 [patent_app_country] => US [patent_app_date] => 1999-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 4289 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/446/06446162.pdf [firstpage_image] =>[orig_patent_app_number] => 09428774 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/428774
Storage system Oct 27, 1999 Issued
Array ( [id] => 1490097 [patent_doc_number] => 06366982 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-02 [patent_title] => 'Raid library apparatus for transportable media and method of controlling the library apparatus' [patent_app_type] => B1 [patent_app_number] => 09/419190 [patent_app_country] => US [patent_app_date] => 1999-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8268 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/366/06366982.pdf [firstpage_image] =>[orig_patent_app_number] => 09419190 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/419190
Raid library apparatus for transportable media and method of controlling the library apparatus Oct 14, 1999 Issued
Array ( [id] => 1557294 [patent_doc_number] => 06349371 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-19 [patent_title] => 'Circuit for storing information' [patent_app_type] => B1 [patent_app_number] => 09/411800 [patent_app_country] => US [patent_app_date] => 1999-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 8930 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/349/06349371.pdf [firstpage_image] =>[orig_patent_app_number] => 09411800 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/411800
Circuit for storing information Sep 30, 1999 Issued
Array ( [id] => 1490136 [patent_doc_number] => 06366993 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-02 [patent_title] => 'Dependency controller and method for overlapping memory access operations' [patent_app_type] => B1 [patent_app_number] => 09/402061 [patent_app_country] => US [patent_app_date] => 1999-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 5275 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/366/06366993.pdf [firstpage_image] =>[orig_patent_app_number] => 09402061 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/402061
Dependency controller and method for overlapping memory access operations Sep 26, 1999 Issued
Array ( [id] => 1552817 [patent_doc_number] => 06446157 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'Cache bank conflict avoidance and cache collision avoidance' [patent_app_type] => B1 [patent_app_number] => 09/399010 [patent_app_country] => US [patent_app_date] => 1999-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 4372 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/446/06446157.pdf [firstpage_image] =>[orig_patent_app_number] => 09399010 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/399010
Cache bank conflict avoidance and cache collision avoidance Sep 19, 1999 Issued
Array ( [id] => 1434043 [patent_doc_number] => 06341333 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-22 [patent_title] => 'Method for transparent exchange of logical volumes in a disk array storage device' [patent_app_type] => B1 [patent_app_number] => 09/396218 [patent_app_country] => US [patent_app_date] => 1999-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 7689 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/341/06341333.pdf [firstpage_image] =>[orig_patent_app_number] => 09396218 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/396218
Method for transparent exchange of logical volumes in a disk array storage device Sep 14, 1999 Issued
Array ( [id] => 1587436 [patent_doc_number] => 06425062 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-23 [patent_title] => 'Controlling burst sequence in synchronous memories' [patent_app_type] => B1 [patent_app_number] => 09/395870 [patent_app_country] => US [patent_app_date] => 1999-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3944 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/425/06425062.pdf [firstpage_image] =>[orig_patent_app_number] => 09395870 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/395870
Controlling burst sequence in synchronous memories Sep 13, 1999 Issued
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