Search

Hoai V. Ho

Examiner (ID: 15701)

Most Active Art Unit
2827
Art Unit(s)
2818, 2827, 2312, 2511
Total Applications
2584
Issued Applications
2371
Pending Applications
99
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1504353 [patent_doc_number] => 06487124 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-11-26 [patent_title] => 'Nonvolatile semiconductor storage device capable of correctly reading selected memory cell and read method' [patent_app_type] => B2 [patent_app_number] => 09/955016 [patent_app_country] => US [patent_app_date] => 2001-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7407 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/487/06487124.pdf [firstpage_image] =>[orig_patent_app_number] => 09955016 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/955016
Nonvolatile semiconductor storage device capable of correctly reading selected memory cell and read method Sep 18, 2001 Issued
Array ( [id] => 6719651 [patent_doc_number] => 20030053339 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-20 [patent_title] => 'Nonvolatile semiconductor memory device having divided bit lines' [patent_app_type] => new [patent_app_number] => 09/956212 [patent_app_country] => US [patent_app_date] => 2001-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4058 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0053/20030053339.pdf [firstpage_image] =>[orig_patent_app_number] => 09956212 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/956212
Nonvolatile semiconductor memory device having divided bit lines Sep 17, 2001 Issued
Array ( [id] => 1359300 [patent_doc_number] => 06584032 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-06-24 [patent_title] => 'Dynamic random access memory having a low power consumption mode, and method of operating the same' [patent_app_type] => B2 [patent_app_number] => 09/949847 [patent_app_country] => US [patent_app_date] => 2001-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 19231 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/584/06584032.pdf [firstpage_image] =>[orig_patent_app_number] => 09949847 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/949847
Dynamic random access memory having a low power consumption mode, and method of operating the same Sep 11, 2001 Issued
Array ( [id] => 1470044 [patent_doc_number] => 06459632 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-01 [patent_title] => 'Semiconductor memory device having redundancy function' [patent_app_type] => B1 [patent_app_number] => 09/945814 [patent_app_country] => US [patent_app_date] => 2001-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5876 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/459/06459632.pdf [firstpage_image] =>[orig_patent_app_number] => 09945814 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/945814
Semiconductor memory device having redundancy function Sep 4, 2001 Issued
Array ( [id] => 6489099 [patent_doc_number] => 20020024860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-28 [patent_title] => 'Semiconductor memory device capable of high speed plural parallel test, method of data writing therefor and parallel tester' [patent_app_type] => new [patent_app_number] => 09/943011 [patent_app_country] => US [patent_app_date] => 2001-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 16179 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20020024860.pdf [firstpage_image] =>[orig_patent_app_number] => 09943011 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/943011
Semiconductor integrated circuit device having internal synchronizing circuit responsive to test mode signal Aug 30, 2001 Issued
Array ( [id] => 1354364 [patent_doc_number] => 06587395 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-01 [patent_title] => 'System to set burst mode in a device' [patent_app_type] => B2 [patent_app_number] => 09/943713 [patent_app_country] => US [patent_app_date] => 2001-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3241 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/587/06587395.pdf [firstpage_image] =>[orig_patent_app_number] => 09943713 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/943713
System to set burst mode in a device Aug 29, 2001 Issued
Array ( [id] => 1482901 [patent_doc_number] => 06452839 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-17 [patent_title] => 'Method for erasing data from a single electron resistor memory' [patent_app_type] => B1 [patent_app_number] => 09/943726 [patent_app_country] => US [patent_app_date] => 2001-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 8997 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/452/06452839.pdf [firstpage_image] =>[orig_patent_app_number] => 09943726 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/943726
Method for erasing data from a single electron resistor memory Aug 28, 2001 Issued
Array ( [id] => 1358584 [patent_doc_number] => 06580655 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-06-17 [patent_title] => 'Pre-charge circuit and method for memory devices with shared sense amplifiers' [patent_app_type] => B2 [patent_app_number] => 09/941911 [patent_app_country] => US [patent_app_date] => 2001-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3897 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 448 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/580/06580655.pdf [firstpage_image] =>[orig_patent_app_number] => 09941911 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/941911
Pre-charge circuit and method for memory devices with shared sense amplifiers Aug 28, 2001 Issued
Array ( [id] => 6139776 [patent_doc_number] => 20020001254 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-03 [patent_title] => 'Synchronous semiconductor memory device' [patent_app_type] => new [patent_app_number] => 09/934691 [patent_app_country] => US [patent_app_date] => 2001-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3820 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20020001254.pdf [firstpage_image] =>[orig_patent_app_number] => 09934691 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/934691
Synchronous semiconductor memory device Aug 22, 2001 Issued
Array ( [id] => 1145462 [patent_doc_number] => 06781914 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-24 [patent_title] => 'Flash memory having a flexible bank partition' [patent_app_type] => B2 [patent_app_number] => 09/938410 [patent_app_country] => US [patent_app_date] => 2001-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3405 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/781/06781914.pdf [firstpage_image] =>[orig_patent_app_number] => 09938410 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/938410
Flash memory having a flexible bank partition Aug 22, 2001 Issued
Array ( [id] => 1427948 [patent_doc_number] => 06519198 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-02-11 [patent_title] => 'Semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 09/935010 [patent_app_country] => US [patent_app_date] => 2001-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 6036 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/519/06519198.pdf [firstpage_image] =>[orig_patent_app_number] => 09935010 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/935010
Semiconductor memory device Aug 20, 2001 Issued
Array ( [id] => 1431658 [patent_doc_number] => 06504748 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-01-07 [patent_title] => 'Ferroelectric random access memory device' [patent_app_type] => B2 [patent_app_number] => 09/931617 [patent_app_country] => US [patent_app_date] => 2001-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3045 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/504/06504748.pdf [firstpage_image] =>[orig_patent_app_number] => 09931617 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/931617
Ferroelectric random access memory device Aug 15, 2001 Issued
Array ( [id] => 6686363 [patent_doc_number] => 20030030086 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-13 [patent_title] => 'DRAM circuitry with a longer refresh period' [patent_app_type] => new [patent_app_number] => 09/682214 [patent_app_country] => US [patent_app_date] => 2001-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1388 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20030030086.pdf [firstpage_image] =>[orig_patent_app_number] => 09682214 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/682214
DRAM circuitry with a longer refresh period Aug 6, 2001 Abandoned
Array ( [id] => 1600130 [patent_doc_number] => 06493275 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-12-10 [patent_title] => 'Semiconductor integrated circuit device and electronic equipment' [patent_app_type] => B2 [patent_app_number] => 09/921912 [patent_app_country] => US [patent_app_date] => 2001-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 14832 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/493/06493275.pdf [firstpage_image] =>[orig_patent_app_number] => 09921912 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/921912
Semiconductor integrated circuit device and electronic equipment Aug 5, 2001 Issued
Array ( [id] => 1354095 [patent_doc_number] => 06587375 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-01 [patent_title] => 'Row decoder for a nonvolatile memory device' [patent_app_type] => B2 [patent_app_number] => 09/923718 [patent_app_country] => US [patent_app_date] => 2001-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 8238 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/587/06587375.pdf [firstpage_image] =>[orig_patent_app_number] => 09923718 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/923718
Row decoder for a nonvolatile memory device Aug 5, 2001 Issued
Array ( [id] => 1431681 [patent_doc_number] => 06504757 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-07 [patent_title] => 'Double boosting scheme for NAND to improve program inhibit characteristics' [patent_app_type] => B1 [patent_app_number] => 09/922415 [patent_app_country] => US [patent_app_date] => 2001-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2559 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/504/06504757.pdf [firstpage_image] =>[orig_patent_app_number] => 09922415 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/922415
Double boosting scheme for NAND to improve program inhibit characteristics Aug 2, 2001 Issued
Array ( [id] => 5950083 [patent_doc_number] => 20020006074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-17 [patent_title] => 'Elimination of precharge operation in synchronous flash memory' [patent_app_type] => new [patent_app_number] => 09/919327 [patent_app_country] => US [patent_app_date] => 2001-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 13554 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20020006074.pdf [firstpage_image] =>[orig_patent_app_number] => 09919327 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/919327
Elimination of precharge operation in synchronous flash memory Jul 30, 2001 Issued
Array ( [id] => 6743969 [patent_doc_number] => 20030021152 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-30 [patent_title] => 'VOLTAGE BOOST CIRCUIT USING SUPPLY VOLTAGE DETECTION TO COMPENSATE FOR SUPPLY VOLTAGE VARIATIONS IN READ MODE VOLTAGES' [patent_app_type] => new [patent_app_number] => 09/915018 [patent_app_country] => US [patent_app_date] => 2001-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8713 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0021/20030021152.pdf [firstpage_image] =>[orig_patent_app_number] => 09915018 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/915018
Voltage boost circuit using supply voltage detection to compensate for supply voltage variations in read mode voltage Jul 24, 2001 Issued
Array ( [id] => 5966262 [patent_doc_number] => 20020089875 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-11 [patent_title] => 'Microcomputer' [patent_app_type] => new [patent_app_number] => 09/910810 [patent_app_country] => US [patent_app_date] => 2001-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3860 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20020089875.pdf [firstpage_image] =>[orig_patent_app_number] => 09910810 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/910810
Microcomputer with efficient program storage Jul 23, 2001 Issued
Array ( [id] => 1504329 [patent_doc_number] => 06487116 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-11-26 [patent_title] => 'Precision programming of nonvolatile memory cells' [patent_app_type] => B2 [patent_app_number] => 09/909817 [patent_app_country] => US [patent_app_date] => 2001-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 8191 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/487/06487116.pdf [firstpage_image] =>[orig_patent_app_number] => 09909817 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/909817
Precision programming of nonvolatile memory cells Jul 19, 2001 Issued
Menu