
Hoai V. Ho
Examiner (ID: 15701)
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2818, 2827, 2312, 2511 |
| Total Applications | 2584 |
| Issued Applications | 2371 |
| Pending Applications | 99 |
| Abandoned Applications | 149 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4326400
[patent_doc_number] => 06317373
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-11-13
[patent_title] => 'Semiconductor memory device having a test mode and semiconductor testing method utilizing the same'
[patent_app_type] => 1
[patent_app_number] => 9/614610
[patent_app_country] => US
[patent_app_date] => 2000-07-12
[patent_effective_date] => 0000-00-00
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[patent_figures_cnt] => 17
[patent_no_of_words] => 7913
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[pdf_file] => patents/06/317/06317373.pdf
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Array
(
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[patent_doc_number] => 06249484
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[patent_kind] => NA
[patent_issue_date] => 2001-06-19
[patent_title] => 'Synchronous memory with programmable read latency'
[patent_app_type] => 1
[patent_app_number] => 9/613195
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[patent_app_date] => 2000-07-10
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/613195 | Synchronous memory with programmable read latency | Jul 9, 2000 | Issued |
Array
(
[id] => 4309462
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[patent_kind] => NA
[patent_issue_date] => 2001-03-06
[patent_title] => 'Memory device having row decoder'
[patent_app_type] => 1
[patent_app_number] => 9/613583
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[patent_app_date] => 2000-07-10
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Array
(
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[patent_issue_date] => 2001-07-17
[patent_title] => 'Semiconductor memory device with overdriven sense amplifier and stabilized power-supply circuit of source follower type'
[patent_app_type] => 1
[patent_app_number] => 9/612281
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/612281 | Semiconductor memory device with overdriven sense amplifier and stabilized power-supply circuit of source follower type | Jul 6, 2000 | Issued |
Array
(
[id] => 1570354
[patent_doc_number] => 06377494
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[patent_issue_date] => 2002-04-23
[patent_title] => 'Semiconductor device and electronic apparatus'
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Array
(
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[patent_issue_date] => 2002-04-09
[patent_title] => 'Semiconductor memory device having plate lines and precharge circuits'
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Array
(
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[patent_issue_date] => 2001-12-25
[patent_title] => 'Static type semiconductor memory device that can suppress standby current'
[patent_app_type] => 1
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[patent_app_date] => 2000-06-29
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[firstpage_image] =>[orig_patent_app_number] => 606316
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/606316 | Static type semiconductor memory device that can suppress standby current | Jun 28, 2000 | Issued |
Array
(
[id] => 4283323
[patent_doc_number] => 06307793
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[patent_issue_date] => 2001-10-23
[patent_title] => 'Memory device, coupling noise eliminator, and coupling noise elimination method'
[patent_app_type] => 1
[patent_app_number] => 9/604910
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[firstpage_image] =>[orig_patent_app_number] => 604910
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/604910 | Memory device, coupling noise eliminator, and coupling noise elimination method | Jun 27, 2000 | Issued |
Array
(
[id] => 4407108
[patent_doc_number] => 06297992
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-10-02
[patent_title] => 'EPROM writing circuit'
[patent_app_type] => 1
[patent_app_number] => 9/605714
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[firstpage_image] =>[orig_patent_app_number] => 605714
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/605714 | EPROM writing circuit | Jun 26, 2000 | Issued |
Array
(
[id] => 4381160
[patent_doc_number] => 06275439
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[patent_kind] => NA
[patent_issue_date] => 2001-08-14
[patent_title] => 'Power supply control apparatus for changing power line connection type in response to operation mode in semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 9/604516
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[firstpage_image] =>[orig_patent_app_number] => 604516
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/604516 | Power supply control apparatus for changing power line connection type in response to operation mode in semiconductor memory device | Jun 26, 2000 | Issued |
Array
(
[id] => 4384684
[patent_doc_number] => 06288971
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-09-11
[patent_title] => 'Apparatus for generating data strobe signal applicable to double data rate SDRAM'
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[patent_app_number] => 9/603912
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/603912 | Apparatus for generating data strobe signal applicable to double data rate SDRAM | Jun 25, 2000 | Issued |
Array
(
[id] => 1488546
[patent_doc_number] => 06366492
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[patent_issue_date] => 2002-04-02
[patent_title] => 'Semiconductor memory device capable of automatically controlling bit-line recovery operation'
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Array
(
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[patent_title] => 'Semiconductor memory having a redundancy judgment circuit'
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Array
(
[id] => 4367737
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Array
(
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[patent_title] => 'Spare address decoder'
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Array
(
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Array
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/583040 | System for improved memory cell access | May 29, 2000 | Issued |