Search

Hoai V Ho

Examiner (ID: 15701, Phone: (571)272-1777 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2818, 2827, 2312, 2511
Total Applications
2584
Issued Applications
2371
Pending Applications
99
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18593122 [patent_doc_number] => 11742031 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-29 [patent_title] => Memory system including the semiconductor memory and a controller [patent_app_type] => utility [patent_app_number] => 17/554710 [patent_app_country] => US [patent_app_date] => 2021-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 13328 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 416 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17554710 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/554710
Memory system including the semiconductor memory and a controller Dec 16, 2021 Issued
Array ( [id] => 17463461 [patent_doc_number] => 20220076767 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-10 [patent_title] => NON-DESTRUCTIVE MODE CACHE PROGRAMMING IN NAND FLASH MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/531217 [patent_app_country] => US [patent_app_date] => 2021-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18918 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17531217 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/531217
Non-destructive mode cache programming in NAND flash memory devices Nov 18, 2021 Issued
Array ( [id] => 18609878 [patent_doc_number] => 11751376 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Semiconductor memory device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/527888 [patent_app_country] => US [patent_app_date] => 2021-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 9170 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17527888 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/527888
Semiconductor memory device and manufacturing method thereof Nov 15, 2021 Issued
Array ( [id] => 18578707 [patent_doc_number] => 11735246 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-22 [patent_title] => Semiconductor device performing refresh operation [patent_app_type] => utility [patent_app_number] => 17/454963 [patent_app_country] => US [patent_app_date] => 2021-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3207 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17454963 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/454963
Semiconductor device performing refresh operation Nov 14, 2021 Issued
Array ( [id] => 18760356 [patent_doc_number] => 11811404 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-07 [patent_title] => Latch circuit, memory device and method [patent_app_type] => utility [patent_app_number] => 17/525270 [patent_app_country] => US [patent_app_date] => 2021-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6782 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17525270 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/525270
Latch circuit, memory device and method Nov 11, 2021 Issued
Array ( [id] => 18364953 [patent_doc_number] => 20230146544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => MEMORY WITH DQS PULSE CONTROL CIRCUITRY, AND ASSOCIATED SYSTEMS, DEVICES, AND METHODS [patent_app_type] => utility [patent_app_number] => 17/523312 [patent_app_country] => US [patent_app_date] => 2021-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9891 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17523312 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/523312
Memory with DQS pulse control circuitry, and associated systems, devices, and methods Nov 9, 2021 Issued
Array ( [id] => 18317355 [patent_doc_number] => 11631439 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-04-18 [patent_title] => Flexible sizing and routing architecture [patent_app_type] => utility [patent_app_number] => 17/515258 [patent_app_country] => US [patent_app_date] => 2021-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8578 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17515258 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/515258
Flexible sizing and routing architecture Oct 28, 2021 Issued
Array ( [id] => 17676351 [patent_doc_number] => 20220189518 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => METHOD AND APPARATUS AND COMPUTER PROGRAM PRODUCT FOR READING DATA FROM MULTIPLE FLASH DIES [patent_app_type] => utility [patent_app_number] => 17/508175 [patent_app_country] => US [patent_app_date] => 2021-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4577 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17508175 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/508175
Method and apparatus and computer program product for reading data from multiple flash dies Oct 21, 2021 Issued
Array ( [id] => 19079274 [patent_doc_number] => 11948649 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-02 [patent_title] => Anti-fuse memory cell and data read-write circuit thereof [patent_app_type] => utility [patent_app_number] => 18/253870 [patent_app_country] => US [patent_app_date] => 2021-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3782 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18253870 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/253870
Anti-fuse memory cell and data read-write circuit thereof Oct 14, 2021 Issued
Array ( [id] => 18578703 [patent_doc_number] => 11735242 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-22 [patent_title] => Electric field switchable magnetic devices [patent_app_type] => utility [patent_app_number] => 17/450852 [patent_app_country] => US [patent_app_date] => 2021-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 40 [patent_no_of_words] => 11548 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17450852 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/450852
Electric field switchable magnetic devices Oct 13, 2021 Issued
Array ( [id] => 19277099 [patent_doc_number] => 12027230 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-02 [patent_title] => Methods and systems for improving read and write of memory cells [patent_app_type] => utility [patent_app_number] => 17/498919 [patent_app_country] => US [patent_app_date] => 2021-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 15070 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17498919 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/498919
Methods and systems for improving read and write of memory cells Oct 11, 2021 Issued
Array ( [id] => 17373411 [patent_doc_number] => 20220028463 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => MEMORY DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/495971 [patent_app_country] => US [patent_app_date] => 2021-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21791 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17495971 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/495971
Memory device for passing verify operation and operating method of the same Oct 6, 2021 Issued
Array ( [id] => 18415813 [patent_doc_number] => 11670358 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Memory with adjustable TSV delay [patent_app_type] => utility [patent_app_number] => 17/496728 [patent_app_country] => US [patent_app_date] => 2021-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 7341 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17496728 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/496728
Memory with adjustable TSV delay Oct 6, 2021 Issued
Array ( [id] => 17373382 [patent_doc_number] => 20220028434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => DATA RECEIVING DEVICES, MEMORY DEVICES HAVING THE SAME, AND OPERATING METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 17/495862 [patent_app_country] => US [patent_app_date] => 2021-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7201 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17495862 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/495862
Data receiving devices, memory devices having the same, and operating methods thereof Oct 6, 2021 Issued
Array ( [id] => 18766766 [patent_doc_number] => 11817173 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-14 [patent_title] => Timing-based computer architecture systems and methods [patent_app_type] => utility [patent_app_number] => 17/492526 [patent_app_country] => US [patent_app_date] => 2021-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 32 [patent_no_of_words] => 16653 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17492526 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/492526
Timing-based computer architecture systems and methods Sep 30, 2021 Issued
Array ( [id] => 17402656 [patent_doc_number] => 20220044747 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-10 [patent_title] => PROGRAMMABLE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/490535 [patent_app_country] => US [patent_app_date] => 2021-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7127 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17490535 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/490535
Programmable memory device Sep 29, 2021 Issued
Array ( [id] => 17992940 [patent_doc_number] => 20220358977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => INTEGRATED CIRCUIT AND SEMICONDUCTOR MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/488863 [patent_app_country] => US [patent_app_date] => 2021-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9983 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17488863 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/488863
Integrated circuit having data output circuit and semiconductor memory system including the same Sep 28, 2021 Issued
Array ( [id] => 18357666 [patent_doc_number] => 11646072 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-09 [patent_title] => Electronic device for adjusting refresh operation period [patent_app_type] => utility [patent_app_number] => 17/480832 [patent_app_country] => US [patent_app_date] => 2021-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 11751 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17480832 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/480832
Electronic device for adjusting refresh operation period Sep 20, 2021 Issued
Array ( [id] => 17318535 [patent_doc_number] => 20210407585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/473648 [patent_app_country] => US [patent_app_date] => 2021-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7710 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17473648 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/473648
Manufacturing method of three-dimensional semiconductor device Sep 12, 2021 Issued
Array ( [id] => 17318509 [patent_doc_number] => 20210407559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => MEMORY DEVICE WITH BUILT-IN FLEXIBLE DOUBLE REDUNDANCY [patent_app_type] => utility [patent_app_number] => 17/472307 [patent_app_country] => US [patent_app_date] => 2021-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12876 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17472307 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/472307
Memory device with built-in flexible double redundancy Sep 9, 2021 Issued
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