Hoai V Ho

Array ( [id] => 17416803 [patent_doc_number] => 20220051707 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => FIRST IN FIRST OUT MEMORY AND MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/446984 [patent_app_country] => US [patent_app_date] => 2021-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3879 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17446984 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17302764 [patent_doc_number] => 20210398603 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => MEMORY DEVICE WITH A MEMORY REPAIR MECHANISM AND METHODS FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/466160 [patent_app_country] => US [patent_app_date] => 2021-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11632 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17466160 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17676350 [patent_doc_number] => 20220189517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => MEMORY DEVICES FOR MULTILPLE READ OPERATIONS [patent_app_type] => utility [patent_app_number] => 17/463789 [patent_app_country] => US [patent_app_date] => 2021-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13066 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17463789 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18222502 [patent_doc_number] => 20230061496 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => CONTENT-ADDRESSABLE MEMORY AND ANALOG CONTENT-ADDRESSABLE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/463607 [patent_app_country] => US [patent_app_date] => 2021-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9026 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17463607 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18239880 [patent_doc_number] => 20230072191 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => SCALABLE IN SITU DRAM-BASED ACCELERATORS AND METHODS OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/462836 [patent_app_country] => US [patent_app_date] => 2021-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13670 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17462836 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18446858 [patent_doc_number] => 11682433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-20 [patent_title] => Multiple stack high voltage circuit for memory [patent_app_type] => utility [patent_app_number] => 17/460938 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 10520 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17460938 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18480982 [patent_doc_number] => 11694733 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-04 [patent_title] => Acceleration of in-memory-compute arrays [patent_app_type] => utility [patent_app_number] => 17/406817 [patent_app_country] => US [patent_app_date] => 2021-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12671 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17406817 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18415810 [patent_doc_number] => 11670355 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Accelerator controlling memory device, computing system including accelerator, and operating method of accelerator [patent_app_type] => utility [patent_app_number] => 17/406511 [patent_app_country] => US [patent_app_date] => 2021-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11533 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17406511 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17262891 [patent_doc_number] => 20210375876 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/402723 [patent_app_country] => US [patent_app_date] => 2021-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8862 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17402723 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17630299 [patent_doc_number] => 20220165314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-26 [patent_title] => OPERATING METHOD OF HOST DEVICE AND MEMORY DEVICE AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/400368 [patent_app_country] => US [patent_app_date] => 2021-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9611 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17400368 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18401919 [patent_doc_number] => 11664063 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-30 [patent_title] => Apparatuses and methods for countering memory attacks [patent_app_type] => utility [patent_app_number] => 17/444925 [patent_app_country] => US [patent_app_date] => 2021-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9002 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17444925 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17992937 [patent_doc_number] => 20220358974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => PIPE LATCH CIRCUIT FOR EXECUTING CONSECUTIVE DATA OUTPUT OPERATION [patent_app_type] => utility [patent_app_number] => 17/395809 [patent_app_country] => US [patent_app_date] => 2021-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7359 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17395809 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18182713 [patent_doc_number] => 20230043443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => MIM EFUSE MEMORY DEVICES AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/396398 [patent_app_country] => US [patent_app_date] => 2021-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7682 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17396398 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18190427 [patent_doc_number] => 11581028 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-14 [patent_title] => Memory device for counting fail bits included in sensed data [patent_app_type] => utility [patent_app_number] => 17/395352 [patent_app_country] => US [patent_app_date] => 2021-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 10380 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17395352 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18073500 [patent_doc_number] => 11532337 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-12-20 [patent_title] => Multilevel content addressable memory, multilevel coding method of and multilevel searching method [patent_app_type] => utility [patent_app_number] => 17/383562 [patent_app_country] => US [patent_app_date] => 2021-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 3256 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17383562 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17217517 [patent_doc_number] => 20210350855 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-11 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/381248 [patent_app_country] => US [patent_app_date] => 2021-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6188 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 474 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17381248 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18150399 [patent_doc_number] => 20230024257 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => MEMORY DEVICE AND GLITCH PREVENTION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/382307 [patent_app_country] => US [patent_app_date] => 2021-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3197 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17382307 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18304232 [patent_doc_number] => 11626144 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-11 [patent_title] => Integrated multilevel memory apparatus and method of operating same [patent_app_type] => utility [patent_app_number] => 17/371890 [patent_app_country] => US [patent_app_date] => 2021-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6892 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17371890 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17810594 [patent_doc_number] => 20220262429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-18 [patent_title] => MEMORY AND OPERATION METHOD OF THE MEMORY [patent_app_type] => utility [patent_app_number] => 17/365416 [patent_app_country] => US [patent_app_date] => 2021-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3729 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17365416 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17900473 [patent_doc_number] => 20220310135 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => DATA OUTPUT BUFFER AND SEMICONDUCTOR APPARATUS INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/361018 [patent_app_country] => US [patent_app_date] => 2021-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6664 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17361018 [rel_patent_id] =>[rel_patent_doc_number] =>)