Search

Hoai V. Ho

Examiner (ID: 5108, Phone: (571)272-1777 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2312, 2818, 2511, 2827
Total Applications
2631
Issued Applications
2404
Pending Applications
100
Abandoned Applications
151

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19574859 [patent_doc_number] => 20240379151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => BIT LINE SENSE AMPLIFIER AND MEMORY DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/784746 [patent_app_country] => US [patent_app_date] => 2024-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14455 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18784746 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/784746
BIT LINE SENSE AMPLIFIER AND MEMORY DEVICE INCLUDING THE SAME Jul 24, 2024 Pending
Array ( [id] => 19558407 [patent_doc_number] => 20240370199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => SYSTEM AND METHOD FOR PRE-SOFT-DECODING TRACKING FOR NAND FLASH MEMORIES [patent_app_type] => utility [patent_app_number] => 18/772885 [patent_app_country] => US [patent_app_date] => 2024-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11844 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18772885 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/772885
SYSTEM AND METHOD FOR PRE-SOFT-DECODING TRACKING FOR NAND FLASH MEMORIES Jul 14, 2024 Pending
Array ( [id] => 19546130 [patent_doc_number] => 20240363166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/766000 [patent_app_country] => US [patent_app_date] => 2024-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6238 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 456 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18766000 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/766000
SEMICONDUCTOR MEMORY DEVICE Jul 7, 2024 Pending
Array ( [id] => 20088556 [patent_doc_number] => 20250218492 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/758738 [patent_app_country] => US [patent_app_date] => 2024-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9979 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18758738 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/758738
Semiconductor memory device and method of operating the same Jun 27, 2024 Issued
Array ( [id] => 20396703 [patent_doc_number] => 20250372178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-04 [patent_title] => NON-VOLATILE MEMORY WITH WORD LINE RAMP SENSING FOR MEMORY CELL TRACKING [patent_app_type] => utility [patent_app_number] => 18/756481 [patent_app_country] => US [patent_app_date] => 2024-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19623 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18756481 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/756481
NON-VOLATILE MEMORY WITH WORD LINE RAMP SENSING FOR MEMORY CELL TRACKING Jun 26, 2024 Pending
Array ( [id] => 19604417 [patent_doc_number] => 20240395297 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => METHODS AND SYSTEMS FOR IMPROVING READ AND WRITE OF MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 18/750750 [patent_app_country] => US [patent_app_date] => 2024-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15101 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18750750 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/750750
METHODS AND SYSTEMS FOR IMPROVING READ AND WRITE OF MEMORY CELLS Jun 20, 2024 Pending
Array ( [id] => 19773134 [patent_doc_number] => 20250054560 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-13 [patent_title] => IMPRINT RECOVERY FOR MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 18/750246 [patent_app_country] => US [patent_app_date] => 2024-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 65697 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18750246 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/750246
IMPRINT RECOVERY FOR MEMORY CELLS Jun 20, 2024 Pending
Array ( [id] => 20977634 [patent_doc_number] => 12738338 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-09-15 [patent_title] => Interrupting a memory built-in self-test [patent_app_type] => utility [patent_app_number] => 18/748620 [patent_app_country] => US [patent_app_date] => 2024-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 12444 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18748620 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/748620
INTERRUPTING A MEMORY BUILT-IN SELF-TEST Jun 19, 2024 Pending
Array ( [id] => 19661802 [patent_doc_number] => 20240428867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => DATA STORAGE DEVICE AND CONTROL METHOD FOR NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 18/746496 [patent_app_country] => US [patent_app_date] => 2024-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2749 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18746496 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/746496
Data storage device and control method for non-volatile memory Jun 17, 2024 Issued
Array ( [id] => 19757794 [patent_doc_number] => 20250046359 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => Controlling Usage-Based Disturbance Mitigation [patent_app_type] => utility [patent_app_number] => 18/742634 [patent_app_country] => US [patent_app_date] => 2024-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13989 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -38 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18742634 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/742634
Controlling Usage-Based Disturbance Mitigation Jun 12, 2024 Pending
Array ( [id] => 19483708 [patent_doc_number] => 20240331750 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => Semiconductor Device and Method of Operating the Same [patent_app_type] => utility [patent_app_number] => 18/739554 [patent_app_country] => US [patent_app_date] => 2024-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8293 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18739554 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/739554
Semiconductor Device and Method of Operating the Same Jun 10, 2024 Pending
Array ( [id] => 19483706 [patent_doc_number] => 20240331748 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => METHOD OF STORING DATA IN MEMORIES [patent_app_type] => utility [patent_app_number] => 18/739724 [patent_app_country] => US [patent_app_date] => 2024-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12182 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18739724 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/739724
Method of storing data in memories Jun 10, 2024 Issued
Array ( [id] => 20411397 [patent_doc_number] => 20250380507 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-11 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/736127 [patent_app_country] => US [patent_app_date] => 2024-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9664 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18736127 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/736127
SEMICONDUCTOR DEVICE AND METHOD THEREOF Jun 5, 2024 Pending
Array ( [id] => 19696103 [patent_doc_number] => 20250014648 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => MEMORY DEVICE USING MULTI-PILLAR MEMORY CELLS FOR MATRIX VECTOR MULTIPLICATION [patent_app_type] => utility [patent_app_number] => 18/733520 [patent_app_country] => US [patent_app_date] => 2024-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18628 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18733520 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/733520
MEMORY DEVICE USING MULTI-PILLAR MEMORY CELLS FOR MATRIX VECTOR MULTIPLICATION Jun 3, 2024 Pending
Array ( [id] => 20396689 [patent_doc_number] => 20250372164 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-04 [patent_title] => MECHANISMS FOR PROGRAMMING MULTILEVEL MEMORY DEVICES WITH VARIABLE MEMORY WINDOWS [patent_app_type] => utility [patent_app_number] => 18/732597 [patent_app_country] => US [patent_app_date] => 2024-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3062 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18732597 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/732597
Mechanisms for programming multilevel memory devices with variable memory windows Jun 2, 2024 Issued
Array ( [id] => 20923783 [patent_doc_number] => 12718849 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-08-25 [patent_title] => Sensing amplifier, method and controller for sensing memory cell [patent_app_type] => utility [patent_app_number] => 18/679395 [patent_app_country] => US [patent_app_date] => 2024-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2925 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18679395 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/679395
SENSING AMPLIFIER, METHOD AND CONTROLLER FOR SENSING MEMORY CELL May 29, 2024 Pending
Array ( [id] => 20915186 [patent_doc_number] => 12712040 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-08-18 [patent_title] => Memory circuit with multiply-accumulate (MAC) circuit and method of operating the same [patent_app_type] => utility [patent_app_number] => 18/676801 [patent_app_country] => US [patent_app_date] => 2024-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 20136 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 310 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18676801 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/676801
MEMORY DEVICE AND METHOD OF OPERATING THE SAME May 28, 2024 Pending
Array ( [id] => 20868004 [patent_doc_number] => 12694912 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-07-28 [patent_title] => Memory circuit arrangement for accurate and secure read [patent_app_type] => utility [patent_app_number] => 18/676354 [patent_app_country] => US [patent_app_date] => 2024-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 5064 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18676354 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/676354
MEMORY CIRCUIT ARRANGEMENT FOR ACCURATE AND SECURE READ May 27, 2024 Issued
Array ( [id] => 20564835 [patent_doc_number] => 12567449 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-03 [patent_title] => Semiconductor device having output buffer [patent_app_type] => utility [patent_app_number] => 18/674788 [patent_app_country] => US [patent_app_date] => 2024-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18674788 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/674788
Semiconductor device having output buffer May 23, 2024 Issued
Array ( [id] => 19437883 [patent_doc_number] => 20240306381 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => MEMORY, STORAGE APPARATUS, AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/669828 [patent_app_country] => US [patent_app_date] => 2024-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8588 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18669828 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/669828
Memory, storage apparatus, and electronic device May 20, 2024 Issued
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