Search

Hoai V. Ho

Examiner (ID: 15701)

Most Active Art Unit
2827
Art Unit(s)
2818, 2827, 2312, 2511
Total Applications
2584
Issued Applications
2371
Pending Applications
99
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14706593 [patent_doc_number] => 10381054 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-08-13 [patent_title] => Common boosted assist [patent_app_type] => utility [patent_app_number] => 15/906588 [patent_app_country] => US [patent_app_date] => 2018-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6745 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15906588 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/906588
Common boosted assist Feb 26, 2018 Issued
Array ( [id] => 15400721 [patent_doc_number] => 10541020 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-21 [patent_title] => Controller architecture for reducing on-die capacitance [patent_app_type] => utility [patent_app_number] => 15/906998 [patent_app_country] => US [patent_app_date] => 2018-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3370 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15906998 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/906998
Controller architecture for reducing on-die capacitance Feb 26, 2018 Issued
Array ( [id] => 13995159 [patent_doc_number] => 20190066737 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 15/906592 [patent_app_country] => US [patent_app_date] => 2018-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6542 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15906592 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/906592
Semiconductor memory device Feb 26, 2018 Issued
Array ( [id] => 12871813 [patent_doc_number] => 20180182446 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-28 [patent_title] => SEMICONDUCTOR DEVICE VERIFYING SIGNAL SUPPLIED FROM OUTSIDE [patent_app_type] => utility [patent_app_number] => 15/903666 [patent_app_country] => US [patent_app_date] => 2018-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12535 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15903666 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/903666
SEMICONDUCTOR DEVICE VERIFYING SIGNAL SUPPLIED FROM OUTSIDE Feb 22, 2018 Abandoned
Array ( [id] => 12849559 [patent_doc_number] => 20180175026 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-21 [patent_title] => ROM Chip Manufacturing Structures [patent_app_type] => utility [patent_app_number] => 15/894138 [patent_app_country] => US [patent_app_date] => 2018-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6423 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15894138 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/894138
ROM chip manufacturing structures having shared gate electrodes Feb 11, 2018 Issued
Array ( [id] => 13419447 [patent_doc_number] => 20180261266 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-13 [patent_title] => MEMORY WITH DEFERRED FRACTIONAL ROW ACTIVATION [patent_app_type] => utility [patent_app_number] => 15/889191 [patent_app_country] => US [patent_app_date] => 2018-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16447 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15889191 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/889191
Memory with deferred fractional row activation Feb 4, 2018 Issued
Array ( [id] => 15138977 [patent_doc_number] => 10482970 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-19 [patent_title] => Semiconductor memory system including a plurality of semiconductor memory devices [patent_app_type] => utility [patent_app_number] => 15/881265 [patent_app_country] => US [patent_app_date] => 2018-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 31 [patent_no_of_words] => 10956 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15881265 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/881265
Semiconductor memory system including a plurality of semiconductor memory devices Jan 25, 2018 Issued
Array ( [id] => 15153839 [patent_doc_number] => 20190355397 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => SEMICONDUCTOR DEVICE AND OPERATION METHOD THEREOF, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 16/475906 [patent_app_country] => US [patent_app_date] => 2018-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16782 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 393 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16475906 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/475906
Semiconductor device with reduced power consumption and operation method thereof, electronic component, and electronic device Jan 8, 2018 Issued
Array ( [id] => 13363283 [patent_doc_number] => 20180233181 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-16 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/845698 [patent_app_country] => US [patent_app_date] => 2017-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5738 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15845698 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/845698
Semiconductor device Dec 17, 2017 Issued
Array ( [id] => 13542761 [patent_doc_number] => 20180322927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-08 [patent_title] => Memory Array and Method for Reading, Programming and Erasing the Same [patent_app_type] => utility [patent_app_number] => 15/844806 [patent_app_country] => US [patent_app_date] => 2017-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6145 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15844806 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/844806
Memory array and method for reading, programming and erasing the same Dec 17, 2017 Issued
Array ( [id] => 14616561 [patent_doc_number] => 10360984 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-23 [patent_title] => Data storage device and method of operating the same [patent_app_type] => utility [patent_app_number] => 15/845406 [patent_app_country] => US [patent_app_date] => 2017-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 6877 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15845406 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/845406
Data storage device and method of operating the same Dec 17, 2017 Issued
Array ( [id] => 14888601 [patent_doc_number] => 10424347 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-24 [patent_title] => Providing power availability information to memory [patent_app_type] => utility [patent_app_number] => 15/843195 [patent_app_country] => US [patent_app_date] => 2017-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 5886 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15843195 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/843195
Providing power availability information to memory Dec 14, 2017 Issued
Array ( [id] => 14888601 [patent_doc_number] => 10424347 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-24 [patent_title] => Providing power availability information to memory [patent_app_type] => utility [patent_app_number] => 15/843195 [patent_app_country] => US [patent_app_date] => 2017-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 5886 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15843195 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/843195
Providing power availability information to memory Dec 14, 2017 Issued
Array ( [id] => 14888601 [patent_doc_number] => 10424347 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-24 [patent_title] => Providing power availability information to memory [patent_app_type] => utility [patent_app_number] => 15/843195 [patent_app_country] => US [patent_app_date] => 2017-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 5886 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15843195 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/843195
Providing power availability information to memory Dec 14, 2017 Issued
Array ( [id] => 14888601 [patent_doc_number] => 10424347 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-24 [patent_title] => Providing power availability information to memory [patent_app_type] => utility [patent_app_number] => 15/843195 [patent_app_country] => US [patent_app_date] => 2017-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 5886 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15843195 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/843195
Providing power availability information to memory Dec 14, 2017 Issued
Array ( [id] => 14397329 [patent_doc_number] => 10311953 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-04 [patent_title] => Memory systems and memory programming methods [patent_app_type] => utility [patent_app_number] => 15/831096 [patent_app_country] => US [patent_app_date] => 2017-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 5664 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15831096 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/831096
Memory systems and memory programming methods Dec 3, 2017 Issued
Array ( [id] => 13256727 [patent_doc_number] => 10141057 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-11-27 [patent_title] => Erasing method of single-gate non-volatile memory [patent_app_type] => utility [patent_app_number] => 15/818948 [patent_app_country] => US [patent_app_date] => 2017-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2086 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15818948 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/818948
Erasing method of single-gate non-volatile memory Nov 20, 2017 Issued
Array ( [id] => 13451273 [patent_doc_number] => 20180277179 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-27 [patent_title] => EMBEDDED MEMORY WITH SETUP-HOLD TIME CONTROLLED INTERNALLY OR EXTERNALLY AND ASSOCIATED INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 15/818768 [patent_app_country] => US [patent_app_date] => 2017-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8000 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15818768 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/818768
Embedded memory with setup-hold time controlled internally or externally and associated integrated circuit Nov 20, 2017 Issued
Array ( [id] => 14456333 [patent_doc_number] => 10324123 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-18 [patent_title] => Semiconductor device and method of diagnosing semiconductor device [patent_app_type] => utility [patent_app_number] => 15/820196 [patent_app_country] => US [patent_app_date] => 2017-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 18783 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15820196 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/820196
Semiconductor device and method of diagnosing semiconductor device Nov 20, 2017 Issued
Array ( [id] => 12758917 [patent_doc_number] => 20180144807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-24 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/819106 [patent_app_country] => US [patent_app_date] => 2017-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8962 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15819106 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/819106
SEMICONDUCTOR DEVICE Nov 20, 2017 Abandoned
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