Search

Hoai V. Ho

Examiner (ID: 15701)

Most Active Art Unit
2827
Art Unit(s)
2818, 2827, 2312, 2511
Total Applications
2584
Issued Applications
2371
Pending Applications
99
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13070705 [patent_doc_number] => 10056136 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-21 [patent_title] => Cross-point memory single-selection write technique [patent_app_type] => utility [patent_app_number] => 15/614141 [patent_app_country] => US [patent_app_date] => 2017-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 7990 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15614141 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/614141
Cross-point memory single-selection write technique Jun 4, 2017 Issued
Array ( [id] => 12256744 [patent_doc_number] => 09928893 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-03-27 [patent_title] => 'Circular printed memory system and method having robustness to orientation' [patent_app_type] => utility [patent_app_number] => 15/613668 [patent_app_country] => US [patent_app_date] => 2017-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 8012 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15613668 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/613668
Circular printed memory system and method having robustness to orientation Jun 4, 2017 Issued
Array ( [id] => 12294252 [patent_doc_number] => 09935105 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-03 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 15/607599 [patent_app_country] => US [patent_app_date] => 2017-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 6644 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 432 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15607599 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/607599
Semiconductor device May 28, 2017 Issued
Array ( [id] => 12005176 [patent_doc_number] => 20170309331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-26 [patent_title] => 'APPARATUSES AND METHODS OF READING MEMORY CELLS BASED ON RESPONSE TO A TEST PULSE' [patent_app_type] => utility [patent_app_number] => 15/588301 [patent_app_country] => US [patent_app_date] => 2017-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7943 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15588301 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/588301
Apparatuses and methods of reading memory cells based on response to a test pulse May 4, 2017 Issued
Array ( [id] => 12140010 [patent_doc_number] => 20180018094 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-18 [patent_title] => 'MEMORY DEVICE, MEMORY SYSTEM INCLUDING THE SAME AND OPERATION METHOD OF THE MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/499490 [patent_app_country] => US [patent_app_date] => 2017-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5651 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15499490 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/499490
MEMORY DEVICE, MEMORY SYSTEM INCLUDING THE SAME AND OPERATION METHOD OF THE MEMORY SYSTEM Apr 26, 2017 Abandoned
Array ( [id] => 13950329 [patent_doc_number] => 10210943 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-19 [patent_title] => End of life prediction based on memory wear [patent_app_type] => utility [patent_app_number] => 15/491596 [patent_app_country] => US [patent_app_date] => 2017-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 33 [patent_no_of_words] => 19440 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15491596 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/491596
End of life prediction based on memory wear Apr 18, 2017 Issued
Array ( [id] => 11997251 [patent_doc_number] => 20170301406 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-19 [patent_title] => 'Random number generator device and control method thereof' [patent_app_type] => utility [patent_app_number] => 15/486310 [patent_app_country] => US [patent_app_date] => 2017-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6519 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15486310 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/486310
Random number generator device and control method thereof Apr 12, 2017 Issued
Array ( [id] => 12668215 [patent_doc_number] => 20180114571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-26 [patent_title] => SENSE AMPLIFIER, AND NONVOLATILE MEMORY DEVICE AND SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 15/486516 [patent_app_country] => US [patent_app_date] => 2017-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7556 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15486516 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/486516
Sense amplifier, and nonvolatile memory device and system including the same Apr 12, 2017 Issued
Array ( [id] => 11839836 [patent_doc_number] => 20170221556 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-03 [patent_title] => 'Programming Techniques for Non-Volatile Memories with Charge Trapping Layers' [patent_app_type] => utility [patent_app_number] => 15/486512 [patent_app_country] => US [patent_app_date] => 2017-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 10822 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15486512 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/486512
Programming techniques for non-volatile memories with charge trapping layers Apr 12, 2017 Issued
Array ( [id] => 12573405 [patent_doc_number] => 10020059 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-07-10 [patent_title] => Switchable impedance drivers and related systems and methods [patent_app_type] => utility [patent_app_number] => 15/486168 [patent_app_country] => US [patent_app_date] => 2017-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 6811 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15486168 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/486168
Switchable impedance drivers and related systems and methods Apr 11, 2017 Issued
Array ( [id] => 12497802 [patent_doc_number] => 09997223 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-12 [patent_title] => Semiconductor device including metal-oxide-semiconductor disposed in a column decoder region [patent_app_type] => utility [patent_app_number] => 15/485660 [patent_app_country] => US [patent_app_date] => 2017-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2867 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15485660 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/485660
Semiconductor device including metal-oxide-semiconductor disposed in a column decoder region Apr 11, 2017 Issued
Array ( [id] => 12477243 [patent_doc_number] => 09991000 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-05 [patent_title] => Memory with margin current addition and related methods [patent_app_type] => utility [patent_app_number] => 15/476618 [patent_app_country] => US [patent_app_date] => 2017-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5869 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15476618 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/476618
Memory with margin current addition and related methods Mar 30, 2017 Issued
Array ( [id] => 11966865 [patent_doc_number] => 20170271018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-21 [patent_title] => 'SEMICONDUCTOR DEVICE, PRE-WRITE PROGRAM, AND RESTORATION PROGRAM' [patent_app_type] => utility [patent_app_number] => 15/473439 [patent_app_country] => US [patent_app_date] => 2017-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11147 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15473439 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/473439
Semiconductor device, pre-write program, and restoration program Mar 28, 2017 Issued
Array ( [id] => 12162688 [patent_doc_number] => 20180033954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-01 [patent_title] => 'NANOSECOND-TIMESCALE LOW-ERROR SWITCHING OF 3-TERMINAL MAGNETIC TUNNEL JUNCTION CIRCUITS THROUGH DYNAMIC IN-PLANE-FIELD ASSISTED SPIN-HALL EFFECT' [patent_app_type] => utility [patent_app_number] => 15/462760 [patent_app_country] => US [patent_app_date] => 2017-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 22154 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15462760 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/462760
Nanosecond-timescale low-error switching of 3-terminal magnetic tunnel junction circuits through dynamic in-plane-field assisted spin-hall effect Mar 16, 2017 Issued
Array ( [id] => 14049309 [patent_doc_number] => 20190080761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-14 [patent_title] => CAM MEMORY CELL [patent_app_type] => utility [patent_app_number] => 16/083314 [patent_app_country] => US [patent_app_date] => 2017-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4809 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16083314 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/083314
CAM MEMORY CELL Mar 12, 2017 Abandoned
Array ( [id] => 13270767 [patent_doc_number] => 10147470 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-04 [patent_title] => Semiconductor memory device capable of performing read operation and write operation simultaneously [patent_app_type] => utility [patent_app_number] => 15/456602 [patent_app_country] => US [patent_app_date] => 2017-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4874 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 394 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15456602 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/456602
Semiconductor memory device capable of performing read operation and write operation simultaneously Mar 12, 2017 Issued
Array ( [id] => 11710245 [patent_doc_number] => 20170178743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-22 [patent_title] => 'FUSE-BASED INTEGRITY PROTECTION' [patent_app_type] => utility [patent_app_number] => 15/443624 [patent_app_country] => US [patent_app_date] => 2017-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11997 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15443624 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/443624
Fuse-based integrity protection Feb 26, 2017 Issued
Array ( [id] => 11694152 [patent_doc_number] => 20170169869 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-15 [patent_title] => 'NONVOLATILE RANDOM ACCESS MEMORY INCLUDING CONTROL CIRCUIT CONFIGURED TO RECEIVE COMMANDS AT HIGH AND LOW EDGES OF ONE CLOCK CYCLE' [patent_app_type] => utility [patent_app_number] => 15/442067 [patent_app_country] => US [patent_app_date] => 2017-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9717 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15442067 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/442067
Nonvolatile random access memory including control circuit configured to receive commands at high and low edges of one clock cycle Feb 23, 2017 Issued
Array ( [id] => 11673534 [patent_doc_number] => 20170162258 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-08 [patent_title] => 'Management of Data Storage in Memory Cells Using a Non-Integer Number of Bits Per Cell' [patent_app_type] => utility [patent_app_number] => 15/437715 [patent_app_country] => US [patent_app_date] => 2017-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 11870 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15437715 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/437715
Management of data storage in memory cells using a non-integer number of bits per cell Feb 20, 2017 Issued
Array ( [id] => 12202204 [patent_doc_number] => 09905275 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-27 [patent_title] => 'Providing power availability information to memory' [patent_app_type] => utility [patent_app_number] => 15/434748 [patent_app_country] => US [patent_app_date] => 2017-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 6067 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15434748 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/434748
Providing power availability information to memory Feb 15, 2017 Issued
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