Search

Hoai V. Ho

Examiner (ID: 7578, Phone: (571)272-1777 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2511, 2312, 2827, 2818
Total Applications
2613
Issued Applications
2395
Pending Applications
95
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19500119 [patent_doc_number] => 20240339137 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => DRAM INTERFACE MODE WITH IMPROVED CHANNEL INTEGRITY AND EFFICIENCY AT HIGH SIGNALING RATES [patent_app_type] => utility [patent_app_number] => 18/629086 [patent_app_country] => US [patent_app_date] => 2024-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5715 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18629086 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/629086
DRAM interface mode with improved channel integrity and efficiency at high signaling rates Apr 7, 2024 Issued
Array ( [id] => 20667367 [patent_doc_number] => 12609147 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-21 [patent_title] => Memory devices and stack memory devices generating data strobing signal for data output [patent_app_type] => utility [patent_app_number] => 18/629034 [patent_app_country] => US [patent_app_date] => 2024-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2219 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18629034 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/629034
Memory devices and stack memory devices generating data strobing signal for data output Apr 7, 2024 Issued
Array ( [id] => 20612570 [patent_doc_number] => 12588186 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-24 [patent_title] => Memory device using semiconductor element [patent_app_type] => utility [patent_app_number] => 18/624515 [patent_app_country] => US [patent_app_date] => 2024-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2539 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18624515 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/624515
Memory device using semiconductor element Apr 1, 2024 Issued
Array ( [id] => 19321217 [patent_doc_number] => 20240242763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => SYSTEMS AND METHODS TO STORE MULTI-LEVEL DATA [patent_app_type] => utility [patent_app_number] => 18/621855 [patent_app_country] => US [patent_app_date] => 2024-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9125 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18621855 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/621855
Systems and methods to store multi-level data Mar 28, 2024 Issued
Array ( [id] => 20283324 [patent_doc_number] => 20250308566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => COMPACT DATA LATCHES [patent_app_type] => utility [patent_app_number] => 18/619543 [patent_app_country] => US [patent_app_date] => 2024-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11279 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18619543 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/619543
COMPACT DATA LATCHES Mar 27, 2024 Pending
Array ( [id] => 19986752 [patent_doc_number] => 20250124974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-17 [patent_title] => MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/618567 [patent_app_country] => US [patent_app_date] => 2024-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6318 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18618567 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/618567
MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME Mar 26, 2024 Pending
Array ( [id] => 19321210 [patent_doc_number] => 20240242756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => SEMICONDUCTOR DEVICE HAVING PDA FUNCTION [patent_app_type] => utility [patent_app_number] => 18/618777 [patent_app_country] => US [patent_app_date] => 2024-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7771 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18618777 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/618777
Semiconductor device having PDA function Mar 26, 2024 Issued
Array ( [id] => 19486633 [patent_doc_number] => 20240334675 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => MEMORY DEVICE USING SEMICONDUCTOR ELEMENT [patent_app_type] => utility [patent_app_number] => 18/616472 [patent_app_country] => US [patent_app_date] => 2024-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8561 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18616472 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/616472
MEMORY DEVICE USING SEMICONDUCTOR ELEMENT Mar 25, 2024 Pending
Array ( [id] => 20036033 [patent_doc_number] => 20250174255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => PAGE BUFFERS AND OPERATION METHODS THEREOF, MEMORY DEVICES, AND MEMORY SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/614221 [patent_app_country] => US [patent_app_date] => 2024-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9721 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18614221 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/614221
PAGE BUFFERS AND OPERATION METHODS THEREOF, MEMORY DEVICES, AND MEMORY SYSTEMS Mar 21, 2024 Pending
Array ( [id] => 20690267 [patent_doc_number] => 12620424 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-05 [patent_title] => Storage system latch control [patent_app_type] => utility [patent_app_number] => 18/610387 [patent_app_country] => US [patent_app_date] => 2024-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3517 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18610387 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/610387
STORAGE SYSTEM AND CIRCUITS THEREFOR Mar 19, 2024 Issued
Array ( [id] => 19269041 [patent_doc_number] => 20240212745 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => VARIABLE VOLTAGE BIT LINE PRECHARGE [patent_app_type] => utility [patent_app_number] => 18/601456 [patent_app_country] => US [patent_app_date] => 2024-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3959 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18601456 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/601456
Variable voltage bit line precharge Mar 10, 2024 Issued
Array ( [id] => 20469236 [patent_doc_number] => 12525278 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-13 [patent_title] => Memory device performing timing skew and offset calibration [patent_app_type] => utility [patent_app_number] => 18/600736 [patent_app_country] => US [patent_app_date] => 2024-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 34 [patent_no_of_words] => 10431 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18600736 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/600736
Memory device performing timing skew and offset calibration Mar 9, 2024 Issued
Array ( [id] => 19435729 [patent_doc_number] => 20240304227 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => TECHNIQUES TO CONFIGURE DRIVERS [patent_app_type] => utility [patent_app_number] => 18/597576 [patent_app_country] => US [patent_app_date] => 2024-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11850 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18597576 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/597576
Techniques to configure drivers Mar 5, 2024 Issued
Array ( [id] => 20146596 [patent_doc_number] => 12380942 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-05 [patent_title] => Semiconductor device verifying signal supplied from outside [patent_app_type] => utility [patent_app_number] => 18/595293 [patent_app_country] => US [patent_app_date] => 2024-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 24 [patent_no_of_words] => 7161 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18595293 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/595293
Semiconductor device verifying signal supplied from outside Mar 3, 2024 Issued
Array ( [id] => 20667377 [patent_doc_number] => 12609157 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-21 [patent_title] => Techniques and devices to reduce bus cross talk for memory systems [patent_app_type] => utility [patent_app_number] => 18/588686 [patent_app_country] => US [patent_app_date] => 2024-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6963 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18588686 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/588686
Techniques and devices to reduce bus cross talk for memory systems Feb 26, 2024 Issued
Array ( [id] => 19803712 [patent_doc_number] => 20250069637 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => SEMICONDUCTOR MEMORY DEVICE SELECTIVELY PERFORMING SELF-REFRESH OPERATION AND SELF-REFRESH METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/588739 [patent_app_country] => US [patent_app_date] => 2024-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9287 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18588739 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/588739
SEMICONDUCTOR MEMORY DEVICE SELECTIVELY PERFORMING SELF-REFRESH OPERATION AND SELF-REFRESH METHOD THEREOF Feb 26, 2024 Issued
Array ( [id] => 19467656 [patent_doc_number] => 20240321326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/589303 [patent_app_country] => US [patent_app_date] => 2024-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11564 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18589303 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/589303
SEMICONDUCTOR MEMORY DEVICE Feb 26, 2024 Issued
Array ( [id] => 20132076 [patent_doc_number] => 12374393 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Varying-polarity read operations for polarity-written memory cells [patent_app_type] => utility [patent_app_number] => 18/586149 [patent_app_country] => US [patent_app_date] => 2024-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11307 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18586149 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/586149
Varying-polarity read operations for polarity-written memory cells Feb 22, 2024 Issued
Array ( [id] => 19409082 [patent_doc_number] => 20240292593 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => SEMICONDUCTOR-ELEMENT-INCLUDING MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/585378 [patent_app_country] => US [patent_app_date] => 2024-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11197 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 456 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18585378 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/585378
SEMICONDUCTOR-ELEMENT-INCLUDING MEMORY DEVICE Feb 22, 2024 Abandoned
Array ( [id] => 20667371 [patent_doc_number] => 12609151 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-21 [patent_title] => Address mapping for improved reliability [patent_app_type] => utility [patent_app_number] => 18/584669 [patent_app_country] => US [patent_app_date] => 2024-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7720 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18584669 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/584669
Address mapping for improved reliability Feb 21, 2024 Issued
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