Search

Hoai V Ho

Examiner (ID: 13440, Phone: (571)272-1777 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2827, 2312, 2818, 2511
Total Applications
2583
Issued Applications
2370
Pending Applications
103
Abandoned Applications
147

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20118226 [patent_doc_number] => 12367941 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-22 [patent_title] => Non-destructive mode cache programming in NAND flash memory devices [patent_app_type] => utility [patent_app_number] => 18/538843 [patent_app_country] => US [patent_app_date] => 2023-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 28 [patent_no_of_words] => 13808 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18538843 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/538843
Non-destructive mode cache programming in NAND flash memory devices Dec 12, 2023 Issued
Array ( [id] => 19070821 [patent_doc_number] => 20240105247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => DUAL-PRECISION ANALOG MEMORY CELL AND ARRAY [patent_app_type] => utility [patent_app_number] => 18/528311 [patent_app_country] => US [patent_app_date] => 2023-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5300 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18528311 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/528311
Dual-precision analog memory cell and array Dec 3, 2023 Issued
Array ( [id] => 20118223 [patent_doc_number] => 12367938 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-22 [patent_title] => Semiconductor memory with different threshold voltages of memory cells [patent_app_type] => utility [patent_app_number] => 18/527941 [patent_app_country] => US [patent_app_date] => 2023-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 128 [patent_figures_cnt] => 132 [patent_no_of_words] => 89837 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18527941 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/527941
Semiconductor memory with different threshold voltages of memory cells Dec 3, 2023 Issued
Array ( [id] => 19687697 [patent_doc_number] => 20250006242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => MEMORY DEVICE AND REFRESH CONTROLLING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/522252 [patent_app_country] => US [patent_app_date] => 2023-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10949 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18522252 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/522252
MEMORY DEVICE AND REFRESH CONTROLLING METHOD THEREOF Nov 28, 2023 Pending
Array ( [id] => 19386845 [patent_doc_number] => 20240276715 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => ANTIFUSE-TYPE NON-VOLATILE MEMORY CELL [patent_app_type] => utility [patent_app_number] => 18/520610 [patent_app_country] => US [patent_app_date] => 2023-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9444 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18520610 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/520610
ANTIFUSE-TYPE NON-VOLATILE MEMORY CELL Nov 27, 2023 Pending
Array ( [id] => 20229140 [patent_doc_number] => 12417794 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-16 [patent_title] => Memory device [patent_app_type] => utility [patent_app_number] => 18/515257 [patent_app_country] => US [patent_app_date] => 2023-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18515257 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/515257
Memory device Nov 20, 2023 Issued
Array ( [id] => 20028462 [patent_doc_number] => 20250166684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => SENSING AMPLIFIER OF MEMORY ARRAY, MEMORY DEVICE AND DATA READ METHOD WITH TWO STATE REFERENCE VOLTAGES [patent_app_type] => utility [patent_app_number] => 18/516792 [patent_app_country] => US [patent_app_date] => 2023-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18516792 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/516792
SENSING AMPLIFIER OF MEMORY ARRAY, MEMORY DEVICE AND DATA READ METHOD WITH TWO STATE REFERENCE VOLTAGES Nov 20, 2023 Pending
Array ( [id] => 19321207 [patent_doc_number] => 20240242753 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => CONTROL CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/510829 [patent_app_country] => US [patent_app_date] => 2023-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6298 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18510829 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/510829
CONTROL CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE Nov 15, 2023 Pending
Array ( [id] => 19191125 [patent_doc_number] => 20240170038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => Adaptive Refresh Staggering [patent_app_type] => utility [patent_app_number] => 18/511404 [patent_app_country] => US [patent_app_date] => 2023-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18739 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18511404 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/511404
Adaptive Refresh Staggering Nov 15, 2023 Pending
Array ( [id] => 19335326 [patent_doc_number] => 20240249756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => BUFFER CHIP, SEMICONDUCTOR PACKAGE INCLUDING BUFFER CHIP AND MEMORY CHIP, MEMORY MODULE, AND OPERATION METHOD OF SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/509145 [patent_app_country] => US [patent_app_date] => 2023-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15849 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18509145 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/509145
BUFFER CHIP, SEMICONDUCTOR PACKAGE INCLUDING BUFFER CHIP AND MEMORY CHIP, MEMORY MODULE, AND OPERATION METHOD OF SEMICONDUCTOR PACKAGE Nov 13, 2023 Pending
Array ( [id] => 19452372 [patent_doc_number] => 20240312502 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => CLOCK DISTRIBUTION NETWORK, AND A SEMICONDUCTOR APPARATUS AND A SEMICONDUCTOR SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/497747 [patent_app_country] => US [patent_app_date] => 2023-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13907 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18497747 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/497747
CLOCK DISTRIBUTION NETWORK, AND A SEMICONDUCTOR APPARATUS AND A SEMICONDUCTOR SYSTEM INCLUDING THE SAME Oct 29, 2023 Pending
Array ( [id] => 19384298 [patent_doc_number] => 20240274168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => SEMICONDUCTOR DEVICE AND TRAINING METHOD OF THE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/497772 [patent_app_country] => US [patent_app_date] => 2023-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6388 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18497772 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/497772
SEMICONDUCTOR DEVICE AND TRAINING METHOD OF THE SEMICONDUCTOR DEVICE Oct 29, 2023 Pending
Array ( [id] => 20404261 [patent_doc_number] => 12494241 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-09 [patent_title] => Semiconductor devices for calibrating phase of division clock [patent_app_type] => utility [patent_app_number] => 18/493566 [patent_app_country] => US [patent_app_date] => 2023-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 1166 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18493566 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/493566
SEMICONDUCTOR DEVICES FOR CALIBRATING PHASE OF DIVISION CLOCK Oct 23, 2023 Issued
Array ( [id] => 18961122 [patent_doc_number] => 20240049449 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/382551 [patent_app_country] => US [patent_app_date] => 2023-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8880 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18382551 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/382551
Semiconductor device comprising wiring layer over driver circuit Oct 22, 2023 Issued
Array ( [id] => 19893056 [patent_doc_number] => 20250118368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => SYSTEM AND METHOD FOR IN-NAND PATTERN SEARCH [patent_app_type] => utility [patent_app_number] => 18/481337 [patent_app_country] => US [patent_app_date] => 2023-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7709 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18481337 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/481337
SYSTEM AND METHOD FOR IN-NAND PATTERN SEARCH Oct 4, 2023 Pending
Array ( [id] => 19100761 [patent_doc_number] => 20240119989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => ROW HAMMER MITIGATION [patent_app_type] => utility [patent_app_number] => 18/375810 [patent_app_country] => US [patent_app_date] => 2023-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8880 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18375810 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/375810
ROW HAMMER MITIGATION Oct 1, 2023 Pending
Array ( [id] => 18905740 [patent_doc_number] => 20240021225 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => SIGNAL GENERATOR FOR CONTROLLING TIMING OF SIGNAL IN MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/476030 [patent_app_country] => US [patent_app_date] => 2023-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12380 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18476030 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/476030
Signal generator for controlling timing of signal in memory device Sep 26, 2023 Issued
Array ( [id] => 19679119 [patent_doc_number] => 12190990 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-07 [patent_title] => Deferred fractional memory row activation [patent_app_type] => utility [patent_app_number] => 18/373162 [patent_app_country] => US [patent_app_date] => 2023-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 27 [patent_no_of_words] => 16529 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18373162 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/373162
Deferred fractional memory row activation Sep 25, 2023 Issued
Array ( [id] => 19604416 [patent_doc_number] => 20240395296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => SEMICONDUCTOR DEVICES RELATED TO DATA INPUT AND OUTPUT OPERATIONS [patent_app_type] => utility [patent_app_number] => 18/470271 [patent_app_country] => US [patent_app_date] => 2023-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15114 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18470271 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/470271
Semiconductor devices related to data input and output operations Sep 18, 2023 Issued
Array ( [id] => 19859645 [patent_doc_number] => 12262521 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-25 [patent_title] => Manufacturing method of semiconductor memory device [patent_app_type] => utility [patent_app_number] => 18/461291 [patent_app_country] => US [patent_app_date] => 2023-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 9187 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18461291 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/461291
Manufacturing method of semiconductor memory device Sep 4, 2023 Issued
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