
Hoai V. Ho
Examiner (ID: 15701)
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2818, 2827, 2312, 2511 |
| Total Applications | 2584 |
| Issued Applications | 2371 |
| Pending Applications | 99 |
| Abandoned Applications | 149 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11665960
[patent_doc_number] => 20170154679
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-01
[patent_title] => 'SEMICONDUCTOR MEMORY SYSTEM INCLUDING A PLURALITY OF SEMICONDUCTOR MEMORY DEVICES'
[patent_app_type] => utility
[patent_app_number] => 15/430983
[patent_app_country] => US
[patent_app_date] => 2017-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 11491
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15430983
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/430983 | Semiconductor memory system including a plurality of semiconductor memory devices | Feb 12, 2017 | Issued |
Array
(
[id] => 12202228
[patent_doc_number] => 09905300
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-02-27
[patent_title] => 'Memory device with variable trim parameters'
[patent_app_type] => utility
[patent_app_number] => 15/417527
[patent_app_country] => US
[patent_app_date] => 2017-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3475
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15417527
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/417527 | Memory device with variable trim parameters | Jan 26, 2017 | Issued |
Array
(
[id] => 11607778
[patent_doc_number] => 20170125081
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-05-04
[patent_title] => 'SEMICONDUCTOR DEVICE VERIFYING SIGNAL SUPPLIED FROM OUTSIDE'
[patent_app_type] => utility
[patent_app_number] => 15/403531
[patent_app_country] => US
[patent_app_date] => 2017-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 12991
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15403531
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/403531 | SEMICONDUCTOR DEVICE VERIFYING SIGNAL SUPPLIED FROM OUTSIDE | Jan 10, 2017 | Abandoned |
Array
(
[id] => 12214653
[patent_doc_number] => 09911468
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-03-06
[patent_title] => 'Memory with deferred fractional row activation'
[patent_app_type] => utility
[patent_app_number] => 15/390674
[patent_app_country] => US
[patent_app_date] => 2016-12-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 27
[patent_no_of_words] => 17713
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15390674
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/390674 | Memory with deferred fractional row activation | Dec 25, 2016 | Issued |
Array
(
[id] => 11830527
[patent_doc_number] => 09727269
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-08-08
[patent_title] => 'System and method for retaining DRAM data when reprogramming reconfigurable devices with DRAM memory controllers incorporating a data maintenance block colocated with a memory module or subsystem'
[patent_app_type] => utility
[patent_app_number] => 15/389650
[patent_app_country] => US
[patent_app_date] => 2016-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5475
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15389650
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/389650 | System and method for retaining DRAM data when reprogramming reconfigurable devices with DRAM memory controllers incorporating a data maintenance block colocated with a memory module or subsystem | Dec 22, 2016 | Issued |
Array
(
[id] => 11710237
[patent_doc_number] => 20170178736
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-22
[patent_title] => 'SUB-BLOCK MODE FOR NON-VOLATILE MEMORY'
[patent_app_type] => utility
[patent_app_number] => 15/385454
[patent_app_country] => US
[patent_app_date] => 2016-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 15025
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15385454
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/385454 | Sub-block mode for non-volatile memory | Dec 19, 2016 | Issued |
Array
(
[id] => 11890757
[patent_doc_number] => 09761320
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-09-12
[patent_title] => 'Reducing hot electron injection type of read disturb during read recovery phase in 3D memory'
[patent_app_type] => utility
[patent_app_number] => 15/383852
[patent_app_country] => US
[patent_app_date] => 2016-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 43
[patent_no_of_words] => 16467
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15383852
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/383852 | Reducing hot electron injection type of read disturb during read recovery phase in 3D memory | Dec 18, 2016 | Issued |
Array
(
[id] => 12202213
[patent_doc_number] => 09905284
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-02-27
[patent_title] => 'Data reading procedure based on voltage values of power supplied to memory cells'
[patent_app_type] => utility
[patent_app_number] => 15/384258
[patent_app_country] => US
[patent_app_date] => 2016-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 18
[patent_no_of_words] => 9761
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15384258
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/384258 | Data reading procedure based on voltage values of power supplied to memory cells | Dec 18, 2016 | Issued |
Array
(
[id] => 12931030
[patent_doc_number] => 09829532
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-11-28
[patent_title] => Semiconductor device and method of diagnosing semiconductor device
[patent_app_type] => utility
[patent_app_number] => 15/365572
[patent_app_country] => US
[patent_app_date] => 2016-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 17
[patent_no_of_words] => 18780
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15365572
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/365572 | Semiconductor device and method of diagnosing semiconductor device | Nov 29, 2016 | Issued |
Array
(
[id] => 11817716
[patent_doc_number] => 09721673
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-08-01
[patent_title] => 'Distributed current source/sink using inactive memory elements'
[patent_app_type] => utility
[patent_app_number] => 15/363056
[patent_app_country] => US
[patent_app_date] => 2016-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 4069
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15363056
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/363056 | Distributed current source/sink using inactive memory elements | Nov 28, 2016 | Issued |
Array
(
[id] => 11925376
[patent_doc_number] => 09792962
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-10-17
[patent_title] => 'Sense amplifier for memory device'
[patent_app_type] => utility
[patent_app_number] => 15/363270
[patent_app_country] => US
[patent_app_date] => 2016-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4669
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15363270
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/363270 | Sense amplifier for memory device | Nov 28, 2016 | Issued |
Array
(
[id] => 12935320
[patent_doc_number] => 09830992
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-11-28
[patent_title] => Operation method of non-volatile memory cell and applications thereof
[patent_app_type] => utility
[patent_app_number] => 15/362052
[patent_app_country] => US
[patent_app_date] => 2016-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 5853
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15362052
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/362052 | Operation method of non-volatile memory cell and applications thereof | Nov 27, 2016 | Issued |
Array
(
[id] => 11495191
[patent_doc_number] => 20170069376
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-03-09
[patent_title] => 'SEMICONDUCTOR DEVICE AND INFORMATION READING METHOD'
[patent_app_type] => utility
[patent_app_number] => 15/356045
[patent_app_country] => US
[patent_app_date] => 2016-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 16328
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15356045
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/356045 | Semiconductor device and information reading method | Nov 17, 2016 | Issued |
Array
(
[id] => 11897974
[patent_doc_number] => 09767913
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-09-19
[patent_title] => 'Memory system performing read of nonvolatile semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 15/343484
[patent_app_country] => US
[patent_app_date] => 2016-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 19
[patent_no_of_words] => 11978
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15343484
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/343484 | Memory system performing read of nonvolatile semiconductor memory device | Nov 3, 2016 | Issued |
Array
(
[id] => 11544081
[patent_doc_number] => 20170097905
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-04-06
[patent_title] => 'SEMICONDUCTOR MEMORY SYSTEMS WITH ON-DIE DATA BUFFERING'
[patent_app_type] => utility
[patent_app_number] => 15/333001
[patent_app_country] => US
[patent_app_date] => 2016-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 32
[patent_figures_cnt] => 32
[patent_no_of_words] => 14628
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15333001
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/333001 | Semiconductor memory systems with on-die data buffering | Oct 23, 2016 | Issued |
Array
(
[id] => 14706603
[patent_doc_number] => 10381059
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-08-13
[patent_title] => Magnetic memory element
[patent_app_type] => utility
[patent_app_number] => 15/768522
[patent_app_country] => US
[patent_app_date] => 2016-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 12
[patent_no_of_words] => 4682
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15768522
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/768522 | Magnetic memory element | Oct 14, 2016 | Issued |
Array
(
[id] => 11385735
[patent_doc_number] => 20170011791
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-01-12
[patent_title] => 'SEMICONDUCTOR DEVICE HAVING PDA FUNCTION'
[patent_app_type] => utility
[patent_app_number] => 15/271872
[patent_app_country] => US
[patent_app_date] => 2016-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 7929
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15271872
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/271872 | Semiconductor device having PDA function | Sep 20, 2016 | Issued |
Array
(
[id] => 11967204
[patent_doc_number] => 20170271357
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-09-21
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/248336
[patent_app_country] => US
[patent_app_date] => 2016-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 9949
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15248336
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/248336 | Semiconductor memory device having a laminated body including a plurality of control gate electrodes laminated in a first direction | Aug 25, 2016 | Issued |
Array
(
[id] => 11883492
[patent_doc_number] => 09754672
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-09-05
[patent_title] => 'Nonvolatile semiconductor memory device which performs improved erase operation'
[patent_app_type] => utility
[patent_app_number] => 15/245892
[patent_app_country] => US
[patent_app_date] => 2016-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 13
[patent_no_of_words] => 6165
[patent_no_of_claims] => 37
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15245892
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/245892 | Nonvolatile semiconductor memory device which performs improved erase operation | Aug 23, 2016 | Issued |
Array
(
[id] => 11315151
[patent_doc_number] => 20160351261
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-12-01
[patent_title] => 'CONTENT ADDRESSABLE MEMORY CELLS, MEMORY ARRAYS AND METHODS OF FORMING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 15/233111
[patent_app_country] => US
[patent_app_date] => 2016-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 57
[patent_figures_cnt] => 57
[patent_no_of_words] => 15951
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15233111
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/233111 | Content addressable memory cells and memory arrays | Aug 9, 2016 | Issued |