
Hoai V. Ho
Examiner (ID: 15701)
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2818, 2827, 2312, 2511 |
| Total Applications | 2584 |
| Issued Applications | 2371 |
| Pending Applications | 99 |
| Abandoned Applications | 149 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 12953035
[patent_doc_number] => 09837151
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-12-05
[patent_title] => Memory systems and memory programming methods
[patent_app_type] => utility
[patent_app_number] => 15/150168
[patent_app_country] => US
[patent_app_date] => 2016-05-09
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/150168 | Memory systems and memory programming methods | May 8, 2016 | Issued |
Array
(
[id] => 11050850
[patent_doc_number] => 20160247809
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[patent_kind] => A1
[patent_issue_date] => 2016-08-25
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/148000
[patent_app_country] => US
[patent_app_date] => 2016-05-06
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15148000
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/148000 | Semiconductor device including multilayer wiring layer | May 5, 2016 | Issued |
Array
(
[id] => 11051464
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[patent_kind] => A1
[patent_issue_date] => 2016-08-25
[patent_title] => 'Level Shifters, Memory Systems, and Level Shifting Methods'
[patent_app_type] => utility
[patent_app_number] => 15/144421
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[patent_app_date] => 2016-05-02
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/144421 | Level shifters, memory systems, and level shifting methods | May 1, 2016 | Issued |
Array
(
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[patent_kind] => B2
[patent_issue_date] => 2017-02-14
[patent_title] => 'Electronic device having buried gate and method for fabricating the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/143540 | Electronic device having buried gate and method for fabricating the same | Apr 29, 2016 | Issued |
Array
(
[id] => 11110640
[patent_doc_number] => 20160307609
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[patent_kind] => A1
[patent_issue_date] => 2016-10-20
[patent_title] => 'MEMORY WITH DEFERRED FRACTIONAL ROW ACTIVATION'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/138424 | Memory with deferred fractional row activation | Apr 25, 2016 | Issued |
Array
(
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[patent_issue_date] => 2017-09-05
[patent_title] => 'Semiconductor memory device and data write method thereof'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/134004 | Semiconductor memory device and data write method thereof | Apr 19, 2016 | Issued |
Array
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[patent_title] => 'Magnetic track storage unit, memory, and method for controlling magnetic track storage unit'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/133452 | Magnetic track storage unit, memory, and method for controlling magnetic track storage unit | Apr 19, 2016 | Issued |
Array
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[id] => 11578443
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[patent_issue_date] => 2017-04-25
[patent_title] => 'Semiconductor memory device capable of performing read operation and write operation simultaneously'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/131034 | Semiconductor memory device capable of performing read operation and write operation simultaneously | Apr 17, 2016 | Issued |
Array
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[patent_doc_number] => 09679647
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[patent_issue_date] => 2017-06-13
[patent_title] => 'Semiconductor memory device including a resistance change element and a control circuit for changing resistance of the resistance change element'
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[patent_app_number] => 15/099660
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/099660 | Semiconductor memory device including a resistance change element and a control circuit for changing resistance of the resistance change element | Apr 14, 2016 | Issued |
Array
(
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[patent_issue_date] => 2016-11-10
[patent_title] => 'CIRCUIT FOR READING ONE TIME PROGRAMMABLE MEMORY'
[patent_app_type] => utility
[patent_app_number] => 15/130650
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[patent_app_date] => 2016-04-15
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/130650 | Circuit for reading one time programmable memory | Apr 14, 2016 | Issued |
Array
(
[id] => 11366417
[patent_doc_number] => 20170004398
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[patent_kind] => A1
[patent_issue_date] => 2017-01-05
[patent_title] => 'BOLTZMANN MACHINE CIRCUIT AND METHOD FOR CONTROLLING CIRCUIT'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/130377 | Boltzmann machine circuit | Apr 14, 2016 | Issued |
Array
(
[id] => 11861740
[patent_doc_number] => 09741429
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[patent_issue_date] => 2017-08-22
[patent_title] => 'Memory with write assist circuit'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/099706 | Memory with write assist circuit | Apr 14, 2016 | Issued |
Array
(
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[patent_issue_date] => 2017-05-16
[patent_title] => 'Nonvolatile memory device having connection unit for allowing precharging of bit lines in single step'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/099146 | Nonvolatile memory device having connection unit for allowing precharging of bit lines in single step | Apr 13, 2016 | Issued |
Array
(
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[patent_title] => 'Non-volatile memory device having vertical structure and method of operating the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/094184 | Non-volatile memory device having vertical structure and method of operating the same | Apr 7, 2016 | Issued |
Array
(
[id] => 11020876
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[patent_issue_date] => 2016-07-28
[patent_title] => 'PROVIDING POWER AVAILABILITY INFORMATION TO MEMORY'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/090870 | Providing power availability information to memory | Apr 4, 2016 | Issued |
Array
(
[id] => 13847453
[patent_doc_number] => 20190027211
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[patent_issue_date] => 2019-01-24
[patent_title] => POLARIZATION GATE STACK SRAM
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[rel_patent_id] =>[rel_patent_doc_number] =>) 16/078582 | Polarization gate stack SRAM | Mar 31, 2016 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/089313 | SEMICONDUCTOR DEVICE BEING CAPABLE OF IMPROVING THE BREAKDOWN CHARACTERISTICS | Mar 31, 2016 | Abandoned |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/561774 | Non-volatile SRAM memory cell and non-volatile semiconductor storage device | Mar 17, 2016 | Issued |