Search

Hoai V. Ho

Examiner (ID: 15701)

Most Active Art Unit
2827
Art Unit(s)
2818, 2827, 2312, 2511
Total Applications
2584
Issued Applications
2371
Pending Applications
99
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10370163 [patent_doc_number] => 20150255168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-10 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/491754 [patent_app_country] => US [patent_app_date] => 2014-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3250 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14491754 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/491754
Semiconductor memory device and memory system including the same Sep 18, 2014 Issued
Array ( [id] => 10321576 [patent_doc_number] => 20150206580 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-23 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/491086 [patent_app_country] => US [patent_app_date] => 2014-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6207 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14491086 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/491086
Semiconductor memory device Sep 18, 2014 Issued
Array ( [id] => 10377617 [patent_doc_number] => 20150262624 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-17 [patent_title] => 'SEMICONDUCTOR NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/491074 [patent_app_country] => US [patent_app_date] => 2014-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 12744 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14491074 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/491074
Semiconductor nonvolatile memory device with one-time programmable memories Sep 18, 2014 Issued
Array ( [id] => 10370117 [patent_doc_number] => 20150255122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-10 [patent_title] => 'NON-VOLATILE SLEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 14/491058 [patent_app_country] => US [patent_app_date] => 2014-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6895 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14491058 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/491058
Non-volatile semiconductor storage device Sep 18, 2014 Issued
Array ( [id] => 10576797 [patent_doc_number] => 09299447 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-29 [patent_title] => '3-dimensional semiconductor device having memory cells stacked over substrate' [patent_app_type] => utility [patent_app_number] => 14/490484 [patent_app_country] => US [patent_app_date] => 2014-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 6608 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14490484 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/490484
3-dimensional semiconductor device having memory cells stacked over substrate Sep 17, 2014 Issued
Array ( [id] => 9791215 [patent_doc_number] => 20150003159 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-01 [patent_title] => 'METHOD OF OPERATING NONVOLATILE MEMORY DEVICE CONTROLLED BY CONTROLLING COUPLING RESISTANCE VALUE BETWEEN BIT LINE AND PAGE BUFFER' [patent_app_type] => utility [patent_app_number] => 14/485364 [patent_app_country] => US [patent_app_date] => 2014-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 12118 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14485364 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/485364
Method of operating nonvolatile memory device controlled by controlling coupling resistance value between bit line and page buffer Sep 11, 2014 Issued
Array ( [id] => 10638715 [patent_doc_number] => 09356230 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-31 [patent_title] => 'Perpendicular magnetization storage element and storage device' [patent_app_type] => utility [patent_app_number] => 14/478642 [patent_app_country] => US [patent_app_date] => 2014-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 8895 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14478642 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/478642
Perpendicular magnetization storage element and storage device Sep 4, 2014 Issued
Array ( [id] => 11775858 [patent_doc_number] => 09384803 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-05 [patent_title] => 'Storage device and latch management method thereof' [patent_app_type] => utility [patent_app_number] => 14/468936 [patent_app_country] => US [patent_app_date] => 2014-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 8612 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14468936 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/468936
Storage device and latch management method thereof Aug 25, 2014 Issued
Array ( [id] => 10184525 [patent_doc_number] => 09214206 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-15 [patent_title] => 'Method of testing non-volatile memory device and method of managing non-volatile memory device' [patent_app_type] => utility [patent_app_number] => 14/468736 [patent_app_country] => US [patent_app_date] => 2014-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 9080 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14468736 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/468736
Method of testing non-volatile memory device and method of managing non-volatile memory device Aug 25, 2014 Issued
Array ( [id] => 11775892 [patent_doc_number] => 09384837 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-05 [patent_title] => 'Method of erasing memory cells when changing their mode of operation within a nonvolatile memory device' [patent_app_type] => utility [patent_app_number] => 14/467920 [patent_app_country] => US [patent_app_date] => 2014-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 27 [patent_no_of_words] => 14077 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14467920 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/467920
Method of erasing memory cells when changing their mode of operation within a nonvolatile memory device Aug 24, 2014 Issued
Array ( [id] => 10171847 [patent_doc_number] => 09202559 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-01 [patent_title] => 'Semiconductor memory device and method of controlling the same' [patent_app_type] => utility [patent_app_number] => 14/466022 [patent_app_country] => US [patent_app_date] => 2014-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 6705 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14466022 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/466022
Semiconductor memory device and method of controlling the same Aug 21, 2014 Issued
Array ( [id] => 10392385 [patent_doc_number] => 20150277392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/466732 [patent_app_country] => US [patent_app_date] => 2014-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5876 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14466732 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/466732
Semiconductor device being capable of improving the breakdown characteristics Aug 21, 2014 Issued
Array ( [id] => 10384996 [patent_doc_number] => 20150270003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-24 [patent_title] => 'NON-VOLATILE MEMORY AND METHOD FOR PROGRAMMING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/466680 [patent_app_country] => US [patent_app_date] => 2014-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3634 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14466680 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/466680
NON-VOLATILE MEMORY AND METHOD FOR PROGRAMMING THE SAME Aug 21, 2014 Abandoned
Array ( [id] => 10556864 [patent_doc_number] => 09281066 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-08 [patent_title] => 'Dynamically configurable MLC state assignment' [patent_app_type] => utility [patent_app_number] => 14/462931 [patent_app_country] => US [patent_app_date] => 2014-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 7702 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14462931 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/462931
Dynamically configurable MLC state assignment Aug 18, 2014 Issued
Array ( [id] => 10377644 [patent_doc_number] => 20150262651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-17 [patent_title] => 'GAPLESS PATTERN DETECTION CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/455624 [patent_app_country] => US [patent_app_date] => 2014-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4611 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14455624 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/455624
Gapless pattern detection circuit and semiconductor device including the same Aug 7, 2014 Issued
Array ( [id] => 10937941 [patent_doc_number] => 20140340962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-20 [patent_title] => 'THYRISTOR MEMORY AND METHODS OF OPERATION' [patent_app_type] => utility [patent_app_number] => 14/451097 [patent_app_country] => US [patent_app_date] => 2014-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11527 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14451097 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/451097
Thyristor memory and methods of operation Aug 3, 2014 Issued
Array ( [id] => 11117852 [patent_doc_number] => 20160314827 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-27 [patent_title] => 'A Memory Device, Comprising at Least One Element and Associated Method Spintronics' [patent_app_type] => utility [patent_app_number] => 14/908990 [patent_app_country] => US [patent_app_date] => 2014-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6855 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14908990 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/908990
Memory device, comprising at least one element and associated method spintronics Jul 31, 2014 Issued
Array ( [id] => 10952319 [patent_doc_number] => 20140355341 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-04 [patent_title] => 'READ THRESHOLD ESTIMATION IN ANALOG MEMORY CELLS USING SIMULTANEOUS MULTI-VOLTAGE SENSE' [patent_app_type] => utility [patent_app_number] => 14/341991 [patent_app_country] => US [patent_app_date] => 2014-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6844 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14341991 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/341991
Read threshold estimation in analog memory cells using simultaneous multi-voltage sense Jul 27, 2014 Issued
Array ( [id] => 10931217 [patent_doc_number] => 20140334239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-13 [patent_title] => 'I/O CIRCUIT WITH PHASE MIXER FOR SLEW RATE CONTROL' [patent_app_type] => utility [patent_app_number] => 14/338728 [patent_app_country] => US [patent_app_date] => 2014-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3975 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14338728 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/338728
I/O circuit with phase mixer for slew rate control Jul 22, 2014 Issued
Array ( [id] => 10617893 [patent_doc_number] => 09337345 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-10 [patent_title] => 'Semiconductor device including multilayer wiring layer' [patent_app_type] => utility [patent_app_number] => 14/336118 [patent_app_country] => US [patent_app_date] => 2014-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 32 [patent_no_of_words] => 9022 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14336118 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/336118
Semiconductor device including multilayer wiring layer Jul 20, 2014 Issued
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