Search

Hoai V. Ho

Examiner (ID: 7578, Phone: (571)272-1777 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2511, 2312, 2827, 2818
Total Applications
2613
Issued Applications
2395
Pending Applications
95
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19775369 [patent_doc_number] => 20250056795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-13 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/441968 [patent_app_country] => US [patent_app_date] => 2024-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15506 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18441968 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/441968
MEMORY DEVICE Feb 13, 2024 Pending
Array ( [id] => 20345796 [patent_doc_number] => 12469531 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-11 [patent_title] => Signal generator for controlling timing of signal in memory device [patent_app_type] => utility [patent_app_number] => 18/422908 [patent_app_country] => US [patent_app_date] => 2024-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8321 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18422908 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/422908
Signal generator for controlling timing of signal in memory device Jan 24, 2024 Issued
Array ( [id] => 20624754 [patent_doc_number] => 12592266 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-31 [patent_title] => Memory device including voltage generating circuit and operation method of memory device [patent_app_type] => utility [patent_app_number] => 18/418001 [patent_app_country] => US [patent_app_date] => 2024-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 13145 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18418001 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/418001
Memory device including voltage generating circuit and operation method of memory device Jan 18, 2024 Issued
Array ( [id] => 19160838 [patent_doc_number] => 20240153545 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => Systems and Methods for Controlling Power Assertion In a Memory Device [patent_app_type] => utility [patent_app_number] => 18/415278 [patent_app_country] => US [patent_app_date] => 2024-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7180 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18415278 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/415278
Systems and methods for controlling power assertion in a memory device Jan 16, 2024 Issued
Array ( [id] => 20611025 [patent_doc_number] => 12586629 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-24 [patent_title] => Implementing global wordline bias voltages for read state transitions [patent_app_type] => utility [patent_app_number] => 18/402875 [patent_app_country] => US [patent_app_date] => 2024-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 8204 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18402875 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/402875
Implementing global wordline bias voltages for read state transitions Jan 2, 2024 Issued
Array ( [id] => 19804128 [patent_doc_number] => 20250070053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => GENERATION OF PHYSICALLY UNCLONABLE FUNCTION USING ONE-TIME-PROGRAMMABLE MEMORY DEVICES WITH BACKSIDE INTERCONNECT STRUCTURES [patent_app_type] => utility [patent_app_number] => 18/402130 [patent_app_country] => US [patent_app_date] => 2024-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9837 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18402130 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/402130
Generation of physically unclonable function using one-time-programmable memory devices with backside interconnect structures Jan 1, 2024 Issued
Array ( [id] => 20305183 [patent_doc_number] => 12451179 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Refresh window aware truncation of restore voltages for random access memory [patent_app_type] => utility [patent_app_number] => 18/402115 [patent_app_country] => US [patent_app_date] => 2024-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8481 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18402115 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/402115
Refresh window aware truncation of restore voltages for random access memory Jan 1, 2024 Issued
Array ( [id] => 20507900 [patent_doc_number] => 12542182 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-03 [patent_title] => Multi-level drive of content addressable memory (CAM) cells [patent_app_type] => utility [patent_app_number] => 18/398876 [patent_app_country] => US [patent_app_date] => 2023-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 0 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18398876 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/398876
Multi-level drive of content addressable memory (CAM) cells Dec 27, 2023 Issued
Array ( [id] => 20118226 [patent_doc_number] => 12367941 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-22 [patent_title] => Non-destructive mode cache programming in NAND flash memory devices [patent_app_type] => utility [patent_app_number] => 18/538843 [patent_app_country] => US [patent_app_date] => 2023-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 28 [patent_no_of_words] => 13808 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18538843 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/538843
Non-destructive mode cache programming in NAND flash memory devices Dec 12, 2023 Issued
Array ( [id] => 20118223 [patent_doc_number] => 12367938 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-22 [patent_title] => Semiconductor memory with different threshold voltages of memory cells [patent_app_type] => utility [patent_app_number] => 18/527941 [patent_app_country] => US [patent_app_date] => 2023-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 128 [patent_figures_cnt] => 132 [patent_no_of_words] => 89837 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18527941 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/527941
Semiconductor memory with different threshold voltages of memory cells Dec 3, 2023 Issued
Array ( [id] => 19070821 [patent_doc_number] => 20240105247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => DUAL-PRECISION ANALOG MEMORY CELL AND ARRAY [patent_app_type] => utility [patent_app_number] => 18/528311 [patent_app_country] => US [patent_app_date] => 2023-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5300 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18528311 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/528311
Dual-precision analog memory cell and array Dec 3, 2023 Issued
Array ( [id] => 20551411 [patent_doc_number] => 12562209 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-24 [patent_title] => Memory device and refresh controlling method thereof [patent_app_type] => utility [patent_app_number] => 18/522252 [patent_app_country] => US [patent_app_date] => 2023-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6170 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18522252 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/522252
Memory device and refresh controlling method thereof Nov 28, 2023 Issued
Array ( [id] => 19386845 [patent_doc_number] => 20240276715 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => ANTIFUSE-TYPE NON-VOLATILE MEMORY CELL [patent_app_type] => utility [patent_app_number] => 18/520610 [patent_app_country] => US [patent_app_date] => 2023-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9444 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18520610 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/520610
ANTIFUSE-TYPE NON-VOLATILE MEMORY CELL Nov 27, 2023 Pending
Array ( [id] => 20551405 [patent_doc_number] => 12562203 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-24 [patent_title] => Sensing amplifier of memory array, memory device and data read method with two state reference voltages [patent_app_type] => utility [patent_app_number] => 18/516792 [patent_app_country] => US [patent_app_date] => 2023-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 383 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18516792 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/516792
Sensing amplifier of memory array, memory device and data read method with two state reference voltages Nov 20, 2023 Issued
Array ( [id] => 20229140 [patent_doc_number] => 12417794 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-16 [patent_title] => Memory device [patent_app_type] => utility [patent_app_number] => 18/515257 [patent_app_country] => US [patent_app_date] => 2023-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18515257 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/515257
Memory device Nov 20, 2023 Issued
Array ( [id] => 20482631 [patent_doc_number] => 12531107 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-20 [patent_title] => Control circuit and semiconductor memory device [patent_app_type] => utility [patent_app_number] => 18/510829 [patent_app_country] => US [patent_app_date] => 2023-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 1230 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18510829 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/510829
Control circuit and semiconductor memory device Nov 15, 2023 Issued
Array ( [id] => 19191125 [patent_doc_number] => 20240170038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => Adaptive Refresh Staggering [patent_app_type] => utility [patent_app_number] => 18/511404 [patent_app_country] => US [patent_app_date] => 2023-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18739 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18511404 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/511404
Adaptive Refresh Staggering Nov 15, 2023 Pending
Array ( [id] => 19335326 [patent_doc_number] => 20240249756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => BUFFER CHIP, SEMICONDUCTOR PACKAGE INCLUDING BUFFER CHIP AND MEMORY CHIP, MEMORY MODULE, AND OPERATION METHOD OF SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/509145 [patent_app_country] => US [patent_app_date] => 2023-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15849 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18509145 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/509145
BUFFER CHIP, SEMICONDUCTOR PACKAGE INCLUDING BUFFER CHIP AND MEMORY CHIP, MEMORY MODULE, AND OPERATION METHOD OF SEMICONDUCTOR PACKAGE Nov 13, 2023 Pending
Array ( [id] => 19452372 [patent_doc_number] => 20240312502 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => CLOCK DISTRIBUTION NETWORK, AND A SEMICONDUCTOR APPARATUS AND A SEMICONDUCTOR SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/497747 [patent_app_country] => US [patent_app_date] => 2023-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13907 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18497747 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/497747
Clock distribution network, and a semiconductor apparatus and a semiconductor system including the same Oct 29, 2023 Issued
Array ( [id] => 20624753 [patent_doc_number] => 12592265 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-31 [patent_title] => Semiconductor device and training method of the semiconductor device [patent_app_type] => utility [patent_app_number] => 18/497772 [patent_app_country] => US [patent_app_date] => 2023-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2035 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18497772 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/497772
Semiconductor device and training method of the semiconductor device Oct 29, 2023 Issued
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