Search

Hoai V. Ho

Examiner (ID: 15701)

Most Active Art Unit
2827
Art Unit(s)
2818, 2827, 2312, 2511
Total Applications
2584
Issued Applications
2371
Pending Applications
99
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10805777 [patent_doc_number] => 20160151934 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-02 [patent_title] => 'DUST REMOVAL SYSTEM FOR A HANDHELD POWER TOOL' [patent_app_type] => utility [patent_app_number] => 14/905721 [patent_app_country] => US [patent_app_date] => 2014-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3821 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14905721 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/905721
Method for speed controlling a power tool and related power tool Jul 17, 2014 Issued
Array ( [id] => 10826411 [patent_doc_number] => 20160172579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-16 [patent_title] => 'VOLTAGE-CONTROLLED MAGNETIC DEVICE OPERATING OVER A WIDE TEMPERATURE RANGE' [patent_app_type] => utility [patent_app_number] => 14/906770 [patent_app_country] => US [patent_app_date] => 2014-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12513 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14906770 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/906770
Voltage-controlled magnetic device operating over a wide temperature range Jul 17, 2014 Issued
Array ( [id] => 10918169 [patent_doc_number] => 20140321188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-30 [patent_title] => 'MEMORY DEVICES HAVING DATA LINES INCLUDED IN TOP AND BOTTOM CONDUCTIVE LINES' [patent_app_type] => utility [patent_app_number] => 14/330737 [patent_app_country] => US [patent_app_date] => 2014-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6833 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14330737 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/330737
Memory devices having data lines included in top and bottom conductive lines Jul 13, 2014 Issued
Array ( [id] => 10531018 [patent_doc_number] => 09257158 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-09 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/328324 [patent_app_country] => US [patent_app_date] => 2014-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4311 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14328324 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/328324
Semiconductor device Jul 9, 2014 Issued
Array ( [id] => 10922116 [patent_doc_number] => 20140325136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-30 [patent_title] => 'CONFIGURATION FOR POWER REDUCTION IN DRAM' [patent_app_type] => utility [patent_app_number] => 14/327127 [patent_app_country] => US [patent_app_date] => 2014-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6021 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14327127 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/327127
Configuration for power reduction in DRAM Jul 8, 2014 Issued
Array ( [id] => 11781570 [patent_doc_number] => 09390768 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-12 [patent_title] => 'Apparatuses, devices and methods for sensing a snapback event in a circuit' [patent_app_type] => utility [patent_app_number] => 14/318965 [patent_app_country] => US [patent_app_date] => 2014-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 5817 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14318965 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/318965
Apparatuses, devices and methods for sensing a snapback event in a circuit Jun 29, 2014 Issued
Array ( [id] => 11774872 [patent_doc_number] => 09383792 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-05 [patent_title] => 'Memory device, host device, memory system, memory device control method, host device control method and memory system control method' [patent_app_type] => utility [patent_app_number] => 14/312543 [patent_app_country] => US [patent_app_date] => 2014-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9962 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14312543 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/312543
Memory device, host device, memory system, memory device control method, host device control method and memory system control method Jun 22, 2014 Issued
Array ( [id] => 9784321 [patent_doc_number] => 20140301141 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-09 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND DATA WRITE METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/310821 [patent_app_country] => US [patent_app_date] => 2014-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 12064 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14310821 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/310821
Semiconductor memory device and data write method thereof Jun 19, 2014 Issued
Array ( [id] => 9770040 [patent_doc_number] => 20140293703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-02 [patent_title] => 'NON-VOLATILE MEMORY DEVICE HAVING VERTICAL STRUCTURE AND METHOD OF OPERATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/302025 [patent_app_country] => US [patent_app_date] => 2014-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7801 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14302025 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/302025
Non-volatile memory device having vertical structure and method of operating the same Jun 10, 2014 Issued
Array ( [id] => 10213283 [patent_doc_number] => 20150098275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-09 [patent_title] => 'FLASH MEMORY BASED ON STORAGE DEVICES AND METHODS OF OPERATION' [patent_app_type] => utility [patent_app_number] => 14/299464 [patent_app_country] => US [patent_app_date] => 2014-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8130 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14299464 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/299464
Flash memory based on storage devices and methods of operation Jun 8, 2014 Issued
Array ( [id] => 10472001 [patent_doc_number] => 20150357017 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-10 [patent_title] => 'PROGRAMMABLE POWER FOR A MEMORY INTERFACE' [patent_app_type] => utility [patent_app_number] => 14/298730 [patent_app_country] => US [patent_app_date] => 2014-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 15212 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14298730 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/298730
Programmable power for a memory interface Jun 5, 2014 Issued
Array ( [id] => 10277070 [patent_doc_number] => 20150162067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-11 [patent_title] => 'MEMORY AND MEMORY SYSTEM INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/298544 [patent_app_country] => US [patent_app_date] => 2014-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6910 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14298544 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/298544
Memory performing target refresh operation and memory system including the same Jun 5, 2014 Issued
Array ( [id] => 10471997 [patent_doc_number] => 20150357013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-10 [patent_title] => 'TRACKING SCHEME FOR FLOATING BITLINE PRECHARGE' [patent_app_type] => utility [patent_app_number] => 14/298819 [patent_app_country] => US [patent_app_date] => 2014-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8056 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14298819 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/298819
TRACKING SCHEME FOR FLOATING BITLINE PRECHARGE Jun 5, 2014 Abandoned
Array ( [id] => 10165139 [patent_doc_number] => 09196367 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-24 [patent_title] => 'Non-volatile memory apparatus and erasing method thereof' [patent_app_type] => utility [patent_app_number] => 14/295358 [patent_app_country] => US [patent_app_date] => 2014-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 4782 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14295358 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/295358
Non-volatile memory apparatus and erasing method thereof Jun 3, 2014 Issued
Array ( [id] => 9755417 [patent_doc_number] => 20140286118 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-25 [patent_title] => 'SEMICONDUCTOR DEVICE VERIFYING SIGNAL SUPPLIED FROM OUTSIDE' [patent_app_type] => utility [patent_app_number] => 14/295231 [patent_app_country] => US [patent_app_date] => 2014-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 12809 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14295231 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/295231
Semiconductor device verifying signal supplied from outside Jun 2, 2014 Issued
Array ( [id] => 10463614 [patent_doc_number] => 20150348629 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-03 [patent_title] => 'Non-Volatile Ternary Content-Addressable Memory with Resistive Memory Device' [patent_app_type] => utility [patent_app_number] => 14/294174 [patent_app_country] => US [patent_app_date] => 2014-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3458 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14294174 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/294174
Non-volatile ternary content-addressable memory with resistive memory device Jun 2, 2014 Issued
Array ( [id] => 10463609 [patent_doc_number] => 20150348624 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-03 [patent_title] => 'METHOD FOR IMPROVING SENSING MARGIN OF RESISTIVE MEMORY' [patent_app_type] => utility [patent_app_number] => 14/293982 [patent_app_country] => US [patent_app_date] => 2014-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5237 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14293982 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/293982
Method for improving sensing margin of resistive memory Jun 1, 2014 Issued
Array ( [id] => 10463612 [patent_doc_number] => 20150348627 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-03 [patent_title] => 'CROSS-POINT MEMORY SINGLE-SELECTION WRITE TECHNIQUE' [patent_app_type] => utility [patent_app_number] => 14/289858 [patent_app_country] => US [patent_app_date] => 2014-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8245 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14289858 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/289858
Cross-point memory single-selection write technique May 28, 2014 Issued
Array ( [id] => 10463583 [patent_doc_number] => 20150348599 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-03 [patent_title] => 'PROVIDING POWER AVAILABILITY INFORMATION TO MEMORY' [patent_app_type] => utility [patent_app_number] => 14/288618 [patent_app_country] => US [patent_app_date] => 2014-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6013 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14288618 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/288618
Providing power availability information to memory May 27, 2014 Issued
Array ( [id] => 10617416 [patent_doc_number] => 09336862 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-10 [patent_title] => 'Sense amp activation according to word line common point' [patent_app_type] => utility [patent_app_number] => 14/288486 [patent_app_country] => US [patent_app_date] => 2014-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5698 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14288486 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/288486
Sense amp activation according to word line common point May 27, 2014 Issued
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