Search

Hoai V. Ho

Examiner (ID: 15701)

Most Active Art Unit
2827
Art Unit(s)
2818, 2827, 2312, 2511
Total Applications
2584
Issued Applications
2371
Pending Applications
99
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9377271 [patent_doc_number] => 08681541 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-25 [patent_title] => 'Magnetic memory with separate read and write paths' [patent_app_type] => utility [patent_app_number] => 13/966361 [patent_app_country] => US [patent_app_date] => 2013-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 4275 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13966361 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/966361
Magnetic memory with separate read and write paths Aug 13, 2013 Issued
Array ( [id] => 9221621 [patent_doc_number] => 20140016396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-16 [patent_title] => 'Adaptive Reading And Writing Of A Resistive Memory' [patent_app_type] => utility [patent_app_number] => 13/939234 [patent_app_country] => US [patent_app_date] => 2013-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7882 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13939234 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/939234
Adaptive reading of a resistive memory Jul 10, 2013 Issued
Array ( [id] => 9804228 [patent_doc_number] => 20150016173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-15 [patent_title] => 'ROM Chip Manufacturing Structures' [patent_app_type] => utility [patent_app_number] => 13/938776 [patent_app_country] => US [patent_app_date] => 2013-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5874 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13938776 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/938776
ROM chip manufacturing structures Jul 9, 2013 Issued
Array ( [id] => 9267941 [patent_doc_number] => 20140022857 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-23 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/939080 [patent_app_country] => US [patent_app_date] => 2013-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6734 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13939080 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/939080
Semiconductor device including a sense amplifier Jul 9, 2013 Issued
Array ( [id] => 9833201 [patent_doc_number] => 08942027 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-01-27 [patent_title] => 'Memory storage circuit and method of driving memory storage circuit' [patent_app_type] => utility [patent_app_number] => 13/939062 [patent_app_country] => US [patent_app_date] => 2013-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5873 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13939062 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/939062
Memory storage circuit and method of driving memory storage circuit Jul 9, 2013 Issued
Array ( [id] => 9395274 [patent_doc_number] => 20140092680 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-03 [patent_title] => 'MULTIPLE WELL BIAS MEMORY' [patent_app_type] => utility [patent_app_number] => 13/938314 [patent_app_country] => US [patent_app_date] => 2013-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 9544 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13938314 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/938314
Multiple well bias memory Jul 9, 2013 Issued
Array ( [id] => 9959648 [patent_doc_number] => 09007862 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-14 [patent_title] => 'Reducing memory refresh exit time' [patent_app_type] => utility [patent_app_number] => 13/938130 [patent_app_country] => US [patent_app_date] => 2013-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5529 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13938130 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/938130
Reducing memory refresh exit time Jul 8, 2013 Issued
Array ( [id] => 9221630 [patent_doc_number] => 20140016404 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-16 [patent_title] => 'MAGNETIC RANDOM ACCESS MEMORY' [patent_app_type] => utility [patent_app_number] => 13/937236 [patent_app_country] => US [patent_app_date] => 2013-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 66 [patent_figures_cnt] => 66 [patent_no_of_words] => 32626 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13937236 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/937236
MAGNETIC RANDOM ACCESS MEMORY Jul 8, 2013 Abandoned
Array ( [id] => 9846040 [patent_doc_number] => 08947968 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-03 [patent_title] => 'Memory having power saving mode' [patent_app_type] => utility [patent_app_number] => 13/936512 [patent_app_country] => US [patent_app_date] => 2013-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5193 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13936512 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/936512
Memory having power saving mode Jul 7, 2013 Issued
Array ( [id] => 9784322 [patent_doc_number] => 20140301142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-09 [patent_title] => 'SYSTEMS AND METHODS OF WRITE PRECOMPENSATION TO EXTEND LIFE OF A SOLID-STATE MEMORY' [patent_app_type] => utility [patent_app_number] => 13/936116 [patent_app_country] => US [patent_app_date] => 2013-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5865 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13936116 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/936116
Systems and methods of write precompensation to extend life of a solid-state memory Jul 4, 2013 Issued
Array ( [id] => 9287712 [patent_doc_number] => 08644052 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-04 [patent_title] => 'Phase change memory adaptive programming' [patent_app_type] => utility [patent_app_number] => 13/932942 [patent_app_country] => US [patent_app_date] => 2013-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 34 [patent_no_of_words] => 17960 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 317 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13932942 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/932942
Phase change memory adaptive programming Jun 30, 2013 Issued
Array ( [id] => 9119821 [patent_doc_number] => 20130286743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-31 [patent_title] => 'NON-VOLATILE MEMORY PROGRAMMING' [patent_app_type] => utility [patent_app_number] => 13/925192 [patent_app_country] => US [patent_app_date] => 2013-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9923 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13925192 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/925192
Non-volatile memory programming Jun 23, 2013 Issued
Array ( [id] => 9106120 [patent_doc_number] => 20130279252 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-24 [patent_title] => 'DYNAMICALLY CONFIGURABLE MLC STATE ASSIGNMENT' [patent_app_type] => utility [patent_app_number] => 13/919693 [patent_app_country] => US [patent_app_date] => 2013-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7670 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13919693 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/919693
Dynamically configurable MLC state assignment Jun 16, 2013 Issued
Array ( [id] => 9390818 [patent_doc_number] => 08687430 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-01 [patent_title] => 'Analog sensing of memory cells with a source follower driver in a semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 13/919350 [patent_app_country] => US [patent_app_date] => 2013-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9705 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13919350 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/919350
Analog sensing of memory cells with a source follower driver in a semiconductor memory device Jun 16, 2013 Issued
Array ( [id] => 9106099 [patent_doc_number] => 20130279231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-24 [patent_title] => 'Power Limiting in a Content Search System' [patent_app_type] => utility [patent_app_number] => 13/915211 [patent_app_country] => US [patent_app_date] => 2013-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7723 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13915211 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/915211
Power limiting in a content search system Jun 10, 2013 Issued
Array ( [id] => 10899842 [patent_doc_number] => 08923071 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-30 [patent_title] => 'Method of programming a multi-bit per cell non-volatile memory' [patent_app_type] => utility [patent_app_number] => 13/903775 [patent_app_country] => US [patent_app_date] => 2013-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 21 [patent_no_of_words] => 3285 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13903775 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/903775
Method of programming a multi-bit per cell non-volatile memory May 27, 2013 Issued
Array ( [id] => 9052960 [patent_doc_number] => 20130250674 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-26 [patent_title] => 'REFRESHING DATA OF MEMORY CELLS WITH ELECTRICALLY FLOATING BODY TRANSISTORS' [patent_app_type] => utility [patent_app_number] => 13/899192 [patent_app_country] => US [patent_app_date] => 2013-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 14065 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13899192 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/899192
Refreshing data of memory cells with electrically floating body transistors May 20, 2013 Issued
Array ( [id] => 9119833 [patent_doc_number] => 20130286755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-31 [patent_title] => 'DECODER CIRCUIT OF SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 13/899088 [patent_app_country] => US [patent_app_date] => 2013-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9563 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13899088 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/899088
Decoder circuit of semiconductor storage device May 20, 2013 Issued
Array ( [id] => 9038975 [patent_doc_number] => 20130241613 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-19 [patent_title] => 'I/O CIRCUIT WITH PHASE MIXER FOR SLEW RATE CONTROL' [patent_app_type] => utility [patent_app_number] => 13/888035 [patent_app_country] => US [patent_app_date] => 2013-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3942 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13888035 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/888035
I/O circuit with phase mixer for slew rate control May 5, 2013 Issued
Array ( [id] => 8962156 [patent_doc_number] => 20130201758 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-08 [patent_title] => 'NON-VOLATILE MEMORY DEVICE HAVING VERTICAL STRUCTURE AND METHOD OF OPERATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/836212 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 12489 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13836212 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/836212
Non-volatile memory device having vertical structure and method of operating the same Mar 14, 2013 Issued
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