Search

Hoai V. Ho

Examiner (ID: 15701)

Most Active Art Unit
2827
Art Unit(s)
2818, 2827, 2312, 2511
Total Applications
2584
Issued Applications
2371
Pending Applications
99
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9329267 [patent_doc_number] => 20140056049 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-27 [patent_title] => 'MEMORY DEVICES HAVING DATA LINES INCLUDED IN TOP AND BOTTOM CONDUCTIVE LINES' [patent_app_type] => utility [patent_app_number] => 13/590964 [patent_app_country] => US [patent_app_date] => 2012-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6801 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13590964 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/590964
Memory devices having data lines included in top and bottom conductive lines Aug 20, 2012 Issued
Array ( [id] => 9180179 [patent_doc_number] => 20130322164 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-05 [patent_title] => 'SEMICONDUCTOR DEVICE FOR SUPPLYING AND MEASURING ELECTRIC CURRENT THROUGH A PAD' [patent_app_type] => utility [patent_app_number] => 13/590648 [patent_app_country] => US [patent_app_date] => 2012-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4846 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13590648 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/590648
Semiconductor device for supplying and measuring electric current through a pad Aug 20, 2012 Issued
Array ( [id] => 9329288 [patent_doc_number] => 20140056070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-27 [patent_title] => 'APPARATUSES AND METHODS INVOLVING ACCESSING DISTRIBUTED SUB-BLOCKS OF MEMORY CELLS' [patent_app_type] => utility [patent_app_number] => 13/590926 [patent_app_country] => US [patent_app_date] => 2012-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4390 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13590926 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/590926
Apparatuses and methods involving accessing distributed sub-blocks of memory cells Aug 20, 2012 Issued
Array ( [id] => 9329271 [patent_doc_number] => 20140056053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-27 [patent_title] => 'UNIPOLAR MEMORY DEVICES' [patent_app_type] => utility [patent_app_number] => 13/590758 [patent_app_country] => US [patent_app_date] => 2012-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7503 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13590758 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/590758
Unipolar memory devices Aug 20, 2012 Issued
Array ( [id] => 9329269 [patent_doc_number] => 20140056051 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-27 [patent_title] => 'ONE-BIT MEMORY CELL FOR NONVOLATILE MEMORY AND ASSOCIATED CONTROLLING METHOD' [patent_app_type] => utility [patent_app_number] => 13/590392 [patent_app_country] => US [patent_app_date] => 2012-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10625 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13590392 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/590392
One-bit memory cell for nonvolatile memory and associated controlling method Aug 20, 2012 Issued
Array ( [id] => 9329284 [patent_doc_number] => 20140056066 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-27 [patent_title] => 'READ THRESHOLD ESTIMATION IN ANALOG MEMORY CELLS USING SIMULTANEOUS MULTI-VOLTAGE SENSE' [patent_app_type] => utility [patent_app_number] => 13/590816 [patent_app_country] => US [patent_app_date] => 2012-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6849 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13590816 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/590816
Read threshold estimation in analog memory cells using simultaneous multi-voltage sense Aug 20, 2012 Issued
Array ( [id] => 9133432 [patent_doc_number] => 20130294146 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-07 [patent_title] => 'RESISTIVE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/588476 [patent_app_country] => US [patent_app_date] => 2012-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3005 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13588476 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/588476
RESISTIVE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME Aug 16, 2012 Abandoned
Array ( [id] => 8958969 [patent_doc_number] => 08504763 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-06 [patent_title] => 'Method and memory device that powers-up in a read-only mode and is switchable to a read/write mode' [patent_app_type] => utility [patent_app_number] => 13/571937 [patent_app_country] => US [patent_app_date] => 2012-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5708 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13571937 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/571937
Method and memory device that powers-up in a read-only mode and is switchable to a read/write mode Aug 9, 2012 Issued
Array ( [id] => 8508169 [patent_doc_number] => 20120307576 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-06 [patent_title] => 'ANALOG SENSING OF MEMORY CELLS WITH A SOURCE FOLLOWER DRIVER IN A SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/572174 [patent_app_country] => US [patent_app_date] => 2012-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9639 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13572174 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/572174
Analog sensing of memory cells with a source follower driver in a semiconductor memory device Aug 9, 2012 Issued
Array ( [id] => 8501151 [patent_doc_number] => 20120300559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-29 [patent_title] => 'SEMICONDUCTOR MEMORY INCLUDING PADS COUPLED TO EACH OTHER' [patent_app_type] => utility [patent_app_number] => 13/570158 [patent_app_country] => US [patent_app_date] => 2012-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 11603 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13570158 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/570158
Semiconductor memory including switching circuit for selecting data supply Aug 7, 2012 Issued
Array ( [id] => 8615751 [patent_doc_number] => 20130021063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-24 [patent_title] => 'I/O CIRCUIT WITH PHASE MIXER FOR SLEW RATE CONTROL' [patent_app_type] => utility [patent_app_number] => 13/564616 [patent_app_country] => US [patent_app_date] => 2012-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3904 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13564616 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/564616
I/O circuit with phase mixer for slew rate control Jul 31, 2012 Issued
Array ( [id] => 8474435 [patent_doc_number] => 20120273842 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-01 [patent_title] => 'MEMORY DEVICE AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/549272 [patent_app_country] => US [patent_app_date] => 2012-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2279 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13549272 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/549272
Memory array no common source region and method of fabricating the same Jul 12, 2012 Issued
Array ( [id] => 9203982 [patent_doc_number] => 20140003160 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'High-Speed Sensing Scheme for Memory' [patent_app_type] => utility [patent_app_number] => 13/536514 [patent_app_country] => US [patent_app_date] => 2012-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10090 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13536514 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/536514
High-Speed Sensing Scheme for Memory Jun 27, 2012 Abandoned
Array ( [id] => 9203961 [patent_doc_number] => 20140003139 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'MEMORY DEVICES WITH IN-BIT CURRENT LIMITERS' [patent_app_type] => utility [patent_app_number] => 13/536602 [patent_app_country] => US [patent_app_date] => 2012-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3820 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13536602 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/536602
Memory devices with in-bit current limiters Jun 27, 2012 Issued
Array ( [id] => 9207523 [patent_doc_number] => 20140006700 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'CONFIGURATION FOR POWER REDUCTION IN DRAM' [patent_app_type] => utility [patent_app_number] => 13/536724 [patent_app_country] => US [patent_app_date] => 2012-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6021 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13536724 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/536724
Configuration for power reduction in DRAM Jun 27, 2012 Issued
Array ( [id] => 9591051 [patent_doc_number] => 08780604 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-15 [patent_title] => 'State sensing system for eFuse memory' [patent_app_type] => utility [patent_app_number] => 13/535802 [patent_app_country] => US [patent_app_date] => 2012-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7153 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13535802 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/535802
State sensing system for eFuse memory Jun 27, 2012 Issued
Array ( [id] => 9203963 [patent_doc_number] => 20140003140 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'THYRISTOR MEMORY AND METHODS OF OPERATION' [patent_app_type] => utility [patent_app_number] => 13/535048 [patent_app_country] => US [patent_app_date] => 2012-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11498 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13535048 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/535048
Thyristor memory and methods of operation Jun 26, 2012 Issued
Array ( [id] => 9378814 [patent_doc_number] => 08683096 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-25 [patent_title] => 'Configuration of data strobes' [patent_app_type] => utility [patent_app_number] => 13/535278 [patent_app_country] => US [patent_app_date] => 2012-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4470 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13535278 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/535278
Configuration of data strobes Jun 26, 2012 Issued
Array ( [id] => 8450832 [patent_doc_number] => 20120261778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-18 [patent_title] => 'SPIN-TORQUE MEMORY WITH UNIDIRECTIONAL WRITE SCHEME' [patent_app_type] => utility [patent_app_number] => 13/530460 [patent_app_country] => US [patent_app_date] => 2012-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4704 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13530460 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/530460
Spin-torque memory with unidirectional write scheme Jun 21, 2012 Issued
Array ( [id] => 8440840 [patent_doc_number] => 20120257456 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-11 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND DATA WRITE METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/525978 [patent_app_country] => US [patent_app_date] => 2012-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 12166 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13525978 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/525978
Semiconductor memory device and data write method thereof Jun 17, 2012 Issued
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