
Hoai V. Ho
Examiner (ID: 15701)
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2818, 2827, 2312, 2511 |
| Total Applications | 2584 |
| Issued Applications | 2371 |
| Pending Applications | 99 |
| Abandoned Applications | 149 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9329267
[patent_doc_number] => 20140056049
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-27
[patent_title] => 'MEMORY DEVICES HAVING DATA LINES INCLUDED IN TOP AND BOTTOM CONDUCTIVE LINES'
[patent_app_type] => utility
[patent_app_number] => 13/590964
[patent_app_country] => US
[patent_app_date] => 2012-08-21
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/590964 | Memory devices having data lines included in top and bottom conductive lines | Aug 20, 2012 | Issued |
Array
(
[id] => 9180179
[patent_doc_number] => 20130322164
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-12-05
[patent_title] => 'SEMICONDUCTOR DEVICE FOR SUPPLYING AND MEASURING ELECTRIC CURRENT THROUGH A PAD'
[patent_app_type] => utility
[patent_app_number] => 13/590648
[patent_app_country] => US
[patent_app_date] => 2012-08-21
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/590648 | Semiconductor device for supplying and measuring electric current through a pad | Aug 20, 2012 | Issued |
Array
(
[id] => 9329288
[patent_doc_number] => 20140056070
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-27
[patent_title] => 'APPARATUSES AND METHODS INVOLVING ACCESSING DISTRIBUTED SUB-BLOCKS OF MEMORY CELLS'
[patent_app_type] => utility
[patent_app_number] => 13/590926
[patent_app_country] => US
[patent_app_date] => 2012-08-21
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/590926 | Apparatuses and methods involving accessing distributed sub-blocks of memory cells | Aug 20, 2012 | Issued |
Array
(
[id] => 9329271
[patent_doc_number] => 20140056053
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-27
[patent_title] => 'UNIPOLAR MEMORY DEVICES'
[patent_app_type] => utility
[patent_app_number] => 13/590758
[patent_app_country] => US
[patent_app_date] => 2012-08-21
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/590758 | Unipolar memory devices | Aug 20, 2012 | Issued |
Array
(
[id] => 9329269
[patent_doc_number] => 20140056051
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-27
[patent_title] => 'ONE-BIT MEMORY CELL FOR NONVOLATILE MEMORY AND ASSOCIATED CONTROLLING METHOD'
[patent_app_type] => utility
[patent_app_number] => 13/590392
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/590392 | One-bit memory cell for nonvolatile memory and associated controlling method | Aug 20, 2012 | Issued |
Array
(
[id] => 9329284
[patent_doc_number] => 20140056066
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-27
[patent_title] => 'READ THRESHOLD ESTIMATION IN ANALOG MEMORY CELLS USING SIMULTANEOUS MULTI-VOLTAGE SENSE'
[patent_app_type] => utility
[patent_app_number] => 13/590816
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/590816 | Read threshold estimation in analog memory cells using simultaneous multi-voltage sense | Aug 20, 2012 | Issued |
Array
(
[id] => 9133432
[patent_doc_number] => 20130294146
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[patent_issue_date] => 2013-11-07
[patent_title] => 'RESISTIVE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME'
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[patent_app_number] => 13/588476
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/588476 | RESISTIVE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME | Aug 16, 2012 | Abandoned |
Array
(
[id] => 8958969
[patent_doc_number] => 08504763
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[patent_kind] => B2
[patent_issue_date] => 2013-08-06
[patent_title] => 'Method and memory device that powers-up in a read-only mode and is switchable to a read/write mode'
[patent_app_type] => utility
[patent_app_number] => 13/571937
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/571937 | Method and memory device that powers-up in a read-only mode and is switchable to a read/write mode | Aug 9, 2012 | Issued |
Array
(
[id] => 8508169
[patent_doc_number] => 20120307576
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[patent_kind] => A1
[patent_issue_date] => 2012-12-06
[patent_title] => 'ANALOG SENSING OF MEMORY CELLS WITH A SOURCE FOLLOWER DRIVER IN A SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/572174
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/572174 | Analog sensing of memory cells with a source follower driver in a semiconductor memory device | Aug 9, 2012 | Issued |
Array
(
[id] => 8501151
[patent_doc_number] => 20120300559
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-11-29
[patent_title] => 'SEMICONDUCTOR MEMORY INCLUDING PADS COUPLED TO EACH OTHER'
[patent_app_type] => utility
[patent_app_number] => 13/570158
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[patent_app_date] => 2012-08-08
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/570158 | Semiconductor memory including switching circuit for selecting data supply | Aug 7, 2012 | Issued |
Array
(
[id] => 8615751
[patent_doc_number] => 20130021063
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[patent_kind] => A1
[patent_issue_date] => 2013-01-24
[patent_title] => 'I/O CIRCUIT WITH PHASE MIXER FOR SLEW RATE CONTROL'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/564616 | I/O circuit with phase mixer for slew rate control | Jul 31, 2012 | Issued |
Array
(
[id] => 8474435
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/549272 | Memory array no common source region and method of fabricating the same | Jul 12, 2012 | Issued |
Array
(
[id] => 9203982
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Array
(
[id] => 9203961
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/536602 | Memory devices with in-bit current limiters | Jun 27, 2012 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/536724 | Configuration for power reduction in DRAM | Jun 27, 2012 | Issued |
Array
(
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/535048 | Thyristor memory and methods of operation | Jun 26, 2012 | Issued |
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/525978 | Semiconductor memory device and data write method thereof | Jun 17, 2012 | Issued |