Search

Hoai V. Ho

Examiner (ID: 7578, Phone: (571)272-1777 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2511, 2312, 2827, 2818
Total Applications
2613
Issued Applications
2395
Pending Applications
95
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20404261 [patent_doc_number] => 12494241 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-09 [patent_title] => Semiconductor devices for calibrating phase of division clock [patent_app_type] => utility [patent_app_number] => 18/493566 [patent_app_country] => US [patent_app_date] => 2023-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 1166 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18493566 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/493566
Semiconductor devices for calibrating phase of division clock Oct 23, 2023 Issued
Array ( [id] => 18961122 [patent_doc_number] => 20240049449 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/382551 [patent_app_country] => US [patent_app_date] => 2023-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8880 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18382551 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/382551
Semiconductor device comprising wiring layer over driver circuit Oct 22, 2023 Issued
Array ( [id] => 19893056 [patent_doc_number] => 20250118368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => SYSTEM AND METHOD FOR IN-NAND PATTERN SEARCH [patent_app_type] => utility [patent_app_number] => 18/481337 [patent_app_country] => US [patent_app_date] => 2023-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7709 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18481337 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/481337
System and method for in-NAND pattern search Oct 4, 2023 Issued
Array ( [id] => 19100761 [patent_doc_number] => 20240119989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => ROW HAMMER MITIGATION [patent_app_type] => utility [patent_app_number] => 18/375810 [patent_app_country] => US [patent_app_date] => 2023-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8880 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18375810 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/375810
ROW HAMMER MITIGATION Oct 1, 2023 Pending
Array ( [id] => 18905740 [patent_doc_number] => 20240021225 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => SIGNAL GENERATOR FOR CONTROLLING TIMING OF SIGNAL IN MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/476030 [patent_app_country] => US [patent_app_date] => 2023-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12380 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18476030 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/476030
Signal generator for controlling timing of signal in memory device Sep 26, 2023 Issued
Array ( [id] => 19679119 [patent_doc_number] => 12190990 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-07 [patent_title] => Deferred fractional memory row activation [patent_app_type] => utility [patent_app_number] => 18/373162 [patent_app_country] => US [patent_app_date] => 2023-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 27 [patent_no_of_words] => 16529 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18373162 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/373162
Deferred fractional memory row activation Sep 25, 2023 Issued
Array ( [id] => 19604416 [patent_doc_number] => 20240395296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => SEMICONDUCTOR DEVICES RELATED TO DATA INPUT AND OUTPUT OPERATIONS [patent_app_type] => utility [patent_app_number] => 18/470271 [patent_app_country] => US [patent_app_date] => 2023-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15114 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18470271 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/470271
Semiconductor devices related to data input and output operations Sep 18, 2023 Issued
Array ( [id] => 19859645 [patent_doc_number] => 12262521 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-25 [patent_title] => Manufacturing method of semiconductor memory device [patent_app_type] => utility [patent_app_number] => 18/461291 [patent_app_country] => US [patent_app_date] => 2023-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 9187 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18461291 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/461291
Manufacturing method of semiconductor memory device Sep 4, 2023 Issued
Array ( [id] => 19626883 [patent_doc_number] => 12165730 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-10 [patent_title] => Providing power availability information to memory [patent_app_type] => utility [patent_app_number] => 18/241320 [patent_app_country] => US [patent_app_date] => 2023-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 6001 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18241320 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/241320
Providing power availability information to memory Aug 31, 2023 Issued
Array ( [id] => 19515396 [patent_doc_number] => 20240347082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => MEMORY DEVICE SUPPORTING PARALLEL COMPRESSION READ OPERATION AND MEMORY SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/458152 [patent_app_country] => US [patent_app_date] => 2023-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 31145 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18458152 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/458152
Memory device supporting parallel compression read operation and memory system including the same Aug 29, 2023 Issued
Array ( [id] => 19515400 [patent_doc_number] => 20240347086 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => SIGNAL TRANSMISSION CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/458165 [patent_app_country] => US [patent_app_date] => 2023-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15635 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18458165 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/458165
Signal transmission circuit and memory device including the same Aug 29, 2023 Issued
Array ( [id] => 19574853 [patent_doc_number] => 20240379145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM RELATED TO ROW HAMMER REFRESH [patent_app_type] => utility [patent_app_number] => 18/449540 [patent_app_country] => US [patent_app_date] => 2023-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6464 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18449540 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/449540
Semiconductor device and semiconductor system related to row hammer refresh Aug 13, 2023 Issued
Array ( [id] => 18812196 [patent_doc_number] => 20230386533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => MEMORY DEVICES FOR MULTIPLE READ OPERATIONS [patent_app_type] => utility [patent_app_number] => 18/232949 [patent_app_country] => US [patent_app_date] => 2023-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13105 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18232949 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/232949
Memory devices for multiple read operations Aug 10, 2023 Issued
Array ( [id] => 19626885 [patent_doc_number] => 12165732 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-10 [patent_title] => Sense amplifier [patent_app_type] => utility [patent_app_number] => 18/447872 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11727 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18447872 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/447872
Sense amplifier Aug 9, 2023 Issued
Array ( [id] => 19626892 [patent_doc_number] => 12165739 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-10 [patent_title] => Systems and methods for controlling power management operations in a memory device [patent_app_type] => utility [patent_app_number] => 18/446818 [patent_app_country] => US [patent_app_date] => 2023-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 6909 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18446818 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/446818
Systems and methods for controlling power management operations in a memory device Aug 8, 2023 Issued
Array ( [id] => 20367111 [patent_doc_number] => 20250356923 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-20 [patent_title] => SPLIT-GATE MEMORY ARRAY AND METHOD FOR OPERATING SAME [patent_app_type] => utility [patent_app_number] => 18/865444 [patent_app_country] => US [patent_app_date] => 2023-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 340 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18865444 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/865444
SPLIT-GATE MEMORY ARRAY AND METHOD FOR OPERATING SAME Aug 8, 2023 Pending
Array ( [id] => 18789053 [patent_doc_number] => 20230377666 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => MIM EFUSE MEMORY DEVICES AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/362223 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7714 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18362223 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/362223
MIM eFuse memory devices and fabrication method thereof Jul 30, 2023 Issued
Array ( [id] => 19671506 [patent_doc_number] => 12184285 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-31 [patent_title] => Latch circuit and memory device [patent_app_type] => utility [patent_app_number] => 18/362322 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6835 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18362322 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/362322
Latch circuit and memory device Jul 30, 2023 Issued
Array ( [id] => 18774012 [patent_doc_number] => 20230368842 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => CONTENT-ADDRESSABLE MEMORY AND ANALOG CONTENT-ADDRESSABLE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/354706 [patent_app_country] => US [patent_app_date] => 2023-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8827 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 284 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18354706 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/354706
Content-addressable memory and analog content-addressable memory device Jul 18, 2023 Issued
Array ( [id] => 19781323 [patent_doc_number] => 12230361 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Acceleration of in-memory-compute arrays [patent_app_type] => utility [patent_app_number] => 18/346565 [patent_app_country] => US [patent_app_date] => 2023-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12710 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18346565 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/346565
Acceleration of in-memory-compute arrays Jul 2, 2023 Issued
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