Search

Hoai V. Ho

Examiner (ID: 15701)

Most Active Art Unit
2827
Art Unit(s)
2818, 2827, 2312, 2511
Total Applications
2584
Issued Applications
2371
Pending Applications
99
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7668233 [patent_doc_number] => 20110317502 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-29 [patent_title] => 'CONTROL OF INPUTS TO A MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/222858 [patent_app_country] => US [patent_app_date] => 2011-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7358 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13222858 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/222858
Control of inputs to a memory device Aug 30, 2011 Issued
Array ( [id] => 9678643 [patent_doc_number] => 08817563 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-26 [patent_title] => 'Sensing circuit for programmable resistive device using diode as program selector' [patent_app_type] => utility [patent_app_number] => 13/214198 [patent_app_country] => US [patent_app_date] => 2011-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 52 [patent_no_of_words] => 16860 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 299 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13214198 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/214198
Sensing circuit for programmable resistive device using diode as program selector Aug 20, 2011 Issued
Array ( [id] => 8669995 [patent_doc_number] => 20130044533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-21 [patent_title] => 'MEMORY ARRAY WITH CO-PLANAR WAVEGUIDE BASED MEMORY ELEMENT SELECTION' [patent_app_type] => utility [patent_app_number] => 13/213412 [patent_app_country] => US [patent_app_date] => 2011-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3166 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13213412 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/213412
Memory array with co-planar waveguide based memory element selection Aug 18, 2011 Issued
Array ( [id] => 7783178 [patent_doc_number] => 20120044734 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-23 [patent_title] => 'BIT LINE SENSE AMPLIFIER LAYOUT ARRAY, LAYOUT METHOD, AND APPARATUS HAVING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/213508 [patent_app_country] => US [patent_app_date] => 2011-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5891 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20120044734.pdf [firstpage_image] =>[orig_patent_app_number] => 13213508 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/213508
Bit line sense amplifier layout array, layout method, and apparatus having the same Aug 18, 2011 Issued
Array ( [id] => 9346474 [patent_doc_number] => 08665628 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-04 [patent_title] => 'Ferroelectric memory device' [patent_app_type] => utility [patent_app_number] => 13/213396 [patent_app_country] => US [patent_app_date] => 2011-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 14056 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 318 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13213396 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/213396
Ferroelectric memory device Aug 18, 2011 Issued
Array ( [id] => 9577055 [patent_doc_number] => 08767482 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-01 [patent_title] => 'Apparatuses, devices and methods for sensing a snapback event in a circuit' [patent_app_type] => utility [patent_app_number] => 13/213018 [patent_app_country] => US [patent_app_date] => 2011-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 5764 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13213018 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/213018
Apparatuses, devices and methods for sensing a snapback event in a circuit Aug 17, 2011 Issued
Array ( [id] => 9185419 [patent_doc_number] => 08625365 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-07 [patent_title] => 'Memory device and method using encode values for access error condition detection' [patent_app_type] => utility [patent_app_number] => 13/212478 [patent_app_country] => US [patent_app_date] => 2011-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5659 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13212478 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/212478
Memory device and method using encode values for access error condition detection Aug 17, 2011 Issued
Array ( [id] => 8219475 [patent_doc_number] => 20120134226 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-31 [patent_title] => 'SENSE AMPLIFIER AND SENSE AMPLIFIER LATCH HAVING COMMON CONTROL' [patent_app_type] => utility [patent_app_number] => 13/212490 [patent_app_country] => US [patent_app_date] => 2011-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11460 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13212490 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/212490
Sense amplifier and sense amplifier latch having common control Aug 17, 2011 Issued
Array ( [id] => 8271723 [patent_doc_number] => 08213232 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-03 [patent_title] => 'Nonvolatile semiconductor memory, method for reading out thereof, and memory card' [patent_app_type] => utility [patent_app_number] => 13/210431 [patent_app_country] => US [patent_app_date] => 2011-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 13034 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13210431 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/210431
Nonvolatile semiconductor memory, method for reading out thereof, and memory card Aug 15, 2011 Issued
Array ( [id] => 8471279 [patent_doc_number] => 08300468 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-30 [patent_title] => 'Flash memory program inhibit scheme' [patent_app_type] => utility [patent_app_number] => 13/208732 [patent_app_country] => US [patent_app_date] => 2011-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 10306 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13208732 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/208732
Flash memory program inhibit scheme Aug 11, 2011 Issued
Array ( [id] => 8423186 [patent_doc_number] => 08279677 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-10-02 [patent_title] => 'Power supply tracking single ended sensing scheme for SONOS memories' [patent_app_type] => utility [patent_app_number] => 13/206378 [patent_app_country] => US [patent_app_date] => 2011-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1825 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13206378 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/206378
Power supply tracking single ended sensing scheme for SONOS memories Aug 8, 2011 Issued
Array ( [id] => 8376721 [patent_doc_number] => 08259522 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-09-04 [patent_title] => 'Area-efficient memory built-in-self-test circuitry with advanced debug capabilities for distributed memory blocks' [patent_app_type] => utility [patent_app_number] => 13/196811 [patent_app_country] => US [patent_app_date] => 2011-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8149 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13196811 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/196811
Area-efficient memory built-in-self-test circuitry with advanced debug capabilities for distributed memory blocks Aug 1, 2011 Issued
Array ( [id] => 7585552 [patent_doc_number] => 20110280062 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-17 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/188728 [patent_app_country] => US [patent_app_date] => 2011-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7161 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0280/20110280062.pdf [firstpage_image] =>[orig_patent_app_number] => 13188728 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/188728
Semiconductor memory device Jul 21, 2011 Issued
Array ( [id] => 7752852 [patent_doc_number] => 20120026787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-02 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/185840 [patent_app_country] => US [patent_app_date] => 2011-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 20589 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20120026787.pdf [firstpage_image] =>[orig_patent_app_number] => 13185840 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/185840
Semiconductor device and method for driving the same Jul 18, 2011 Issued
Array ( [id] => 8245977 [patent_doc_number] => 08203898 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-19 [patent_title] => 'Leakage and NBTI reduction technique for memory' [patent_app_type] => utility [patent_app_number] => 13/171748 [patent_app_country] => US [patent_app_date] => 2011-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 11767 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/203/08203898.pdf [firstpage_image] =>[orig_patent_app_number] => 13171748 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/171748
Leakage and NBTI reduction technique for memory Jun 28, 2011 Issued
Array ( [id] => 7740899 [patent_doc_number] => 20120020141 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-26 [patent_title] => 'Variable-resistance memory device and its driving method' [patent_app_type] => utility [patent_app_number] => 13/067830 [patent_app_country] => US [patent_app_date] => 2011-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 19240 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20120020141.pdf [firstpage_image] =>[orig_patent_app_number] => 13067830 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/067830
Variable-resistance memory device and its driving method Jun 28, 2011 Issued
Array ( [id] => 7482723 [patent_doc_number] => 20110249494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-13 [patent_title] => 'MULTIPLE SELECT GATES WITH NON-VOLATILE MEMORY CELLS' [patent_app_type] => utility [patent_app_number] => 13/164813 [patent_app_country] => US [patent_app_date] => 2011-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10474 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0249/20110249494.pdf [firstpage_image] =>[orig_patent_app_number] => 13164813 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/164813
Multiple select gates with non-volatile memory cells Jun 20, 2011 Issued
Array ( [id] => 8204573 [patent_doc_number] => 08189366 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-29 [patent_title] => 'Method and apparatus providing a cross-point memory array using a variable resistance memory cell and capacitance' [patent_app_type] => utility [patent_app_number] => 13/158898 [patent_app_country] => US [patent_app_date] => 2011-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3005 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/189/08189366.pdf [firstpage_image] =>[orig_patent_app_number] => 13158898 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/158898
Method and apparatus providing a cross-point memory array using a variable resistance memory cell and capacitance Jun 12, 2011 Issued
Array ( [id] => 9047991 [patent_doc_number] => 08542547 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-24 [patent_title] => 'Semiconductor device and data processing system' [patent_app_type] => utility [patent_app_number] => 13/067552 [patent_app_country] => US [patent_app_date] => 2011-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 7194 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13067552 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/067552
Semiconductor device and data processing system Jun 7, 2011 Issued
Array ( [id] => 8423191 [patent_doc_number] => 08279682 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-02 [patent_title] => 'Determining memory page status' [patent_app_type] => utility [patent_app_number] => 13/154901 [patent_app_country] => US [patent_app_date] => 2011-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 9886 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13154901 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/154901
Determining memory page status Jun 6, 2011 Issued
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