Search

Hoai V. Ho

Examiner (ID: 15701)

Most Active Art Unit
2827
Art Unit(s)
2818, 2827, 2312, 2511
Total Applications
2584
Issued Applications
2371
Pending Applications
99
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8068273 [patent_doc_number] => 20110242884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-06 [patent_title] => 'Programming at Least One Multi-Level Phase Change Memory Cell' [patent_app_type] => utility [patent_app_number] => 13/069512 [patent_app_country] => US [patent_app_date] => 2011-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5320 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0242/20110242884.pdf [firstpage_image] =>[orig_patent_app_number] => 13069512 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/069512
Programming at Least One Multi-Level Phase Change Memory Cell Jun 5, 2011 Abandoned
Array ( [id] => 7666387 [patent_doc_number] => 20110315656 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-29 [patent_title] => 'FERROMAGNETIC NANORINGS, MEDIUMS EMBODYING SAME INCLUDING DEVICES AND METHODS RELATED THERETO' [patent_app_type] => utility [patent_app_number] => 13/153840 [patent_app_country] => US [patent_app_date] => 2011-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4868 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13153840 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/153840
Ferromagnetic nanorings, mediums embodying same including devices and methods related thereto Jun 5, 2011 Issued
Array ( [id] => 7694970 [patent_doc_number] => 20110231620 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-22 [patent_title] => 'MEMORY CONTROLLER, PCB, COMPUTER SYSTEM AND MEMORY ADJUSTING METHOD' [patent_app_type] => utility [patent_app_number] => 13/150663 [patent_app_country] => US [patent_app_date] => 2011-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3541 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20110231620.pdf [firstpage_image] =>[orig_patent_app_number] => 13150663 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/150663
Memory controller for interfacing data, a PCB in a computer system including the memory controller, and memory adjusting method thereof May 31, 2011 Issued
Array ( [id] => 7650045 [patent_doc_number] => 20110299314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-08 [patent_title] => 'Non-Volatile Memory Having 3d Array of Read/Write Elements with Efficient Decoding of Vertical Bit Lines and Word Lines' [patent_app_type] => utility [patent_app_number] => 13/151224 [patent_app_country] => US [patent_app_date] => 2011-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 25811 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0299/20110299314.pdf [firstpage_image] =>[orig_patent_app_number] => 13151224 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/151224
Non-volatile memory having 3D array of read/write elements with efficient decoding of vertical bit lines and word lines May 31, 2011 Issued
Array ( [id] => 9141864 [patent_doc_number] => 08582338 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-11-12 [patent_title] => 'Ternary content addressable memory cell having single transistor pull-down stack' [patent_app_type] => utility [patent_app_number] => 13/149878 [patent_app_country] => US [patent_app_date] => 2011-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 14363 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13149878 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/149878
Ternary content addressable memory cell having single transistor pull-down stack May 30, 2011 Issued
Array ( [id] => 7730131 [patent_doc_number] => 20120014173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-19 [patent_title] => 'Disturb-Free Static Random Access Memory Cell' [patent_app_type] => utility [patent_app_number] => 13/149489 [patent_app_country] => US [patent_app_date] => 2011-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11859 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20120014173.pdf [firstpage_image] =>[orig_patent_app_number] => 13149489 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/149489
Disturb-free static random access memory cell May 30, 2011 Issued
Array ( [id] => 9101147 [patent_doc_number] => 08565036 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-22 [patent_title] => 'Semiconductor memory device including pull-down transistors for non-selected word lines' [patent_app_type] => utility [patent_app_number] => 13/067140 [patent_app_country] => US [patent_app_date] => 2011-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 8432 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 489 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13067140 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/067140
Semiconductor memory device including pull-down transistors for non-selected word lines May 10, 2011 Issued
Array ( [id] => 6044815 [patent_doc_number] => 20110205807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND DATA WRITE METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/099962 [patent_app_country] => US [patent_app_date] => 2011-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 12154 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20110205807.pdf [firstpage_image] =>[orig_patent_app_number] => 13099962 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/099962
Semiconductor memory device and data write method thereof May 2, 2011 Issued
Array ( [id] => 6060649 [patent_doc_number] => 20110199832 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-18 [patent_title] => 'MAGNETIC FLOATING GATE MEMORY' [patent_app_type] => utility [patent_app_number] => 13/096003 [patent_app_country] => US [patent_app_date] => 2011-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3245 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0199/20110199832.pdf [firstpage_image] =>[orig_patent_app_number] => 13096003 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/096003
Magnetic floating gate memory Apr 27, 2011 Issued
Array ( [id] => 8084571 [patent_doc_number] => 08149612 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-04-03 [patent_title] => 'Memory array and method of implementing a memory array' [patent_app_type] => utility [patent_app_number] => 13/085420 [patent_app_country] => US [patent_app_date] => 2011-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 6320 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/149/08149612.pdf [firstpage_image] =>[orig_patent_app_number] => 13085420 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/085420
Memory array and method of implementing a memory array Apr 11, 2011 Issued
Array ( [id] => 7508760 [patent_doc_number] => 20110255358 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-20 [patent_title] => 'Semiconductor device having floating body type transistor' [patent_app_type] => utility [patent_app_number] => 13/064716 [patent_app_country] => US [patent_app_date] => 2011-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5104 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20110255358.pdf [firstpage_image] =>[orig_patent_app_number] => 13064716 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/064716
Semiconductor device having floating body type transistor Apr 10, 2011 Issued
Array ( [id] => 8245931 [patent_doc_number] => 08203864 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-19 [patent_title] => 'Memory cell and methods of forming a memory cell comprising a carbon nanotube fabric element and a steering element' [patent_app_type] => utility [patent_app_number] => 13/083746 [patent_app_country] => US [patent_app_date] => 2011-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 7325 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/203/08203864.pdf [firstpage_image] =>[orig_patent_app_number] => 13083746 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/083746
Memory cell and methods of forming a memory cell comprising a carbon nanotube fabric element and a steering element Apr 10, 2011 Issued
Array ( [id] => 8415785 [patent_doc_number] => 20120243285 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-27 [patent_title] => 'MULTIPLE WRITE DURING SIMULTANEOUS MEMORY ACCESS OF A MULTI-PORT MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/070894 [patent_app_country] => US [patent_app_date] => 2011-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 4747 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13070894 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/070894
Multiple write during simultaneous memory access of a multi-port memory device Mar 23, 2011 Issued
Array ( [id] => 6186315 [patent_doc_number] => 20110170346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-14 [patent_title] => 'NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE, SIGNAL PROCESSING SYSTEM, METHOD FOR CONTROLLING SIGNAL PROCESSING SYSTEM, AND METHOD FOR REPROGRAMMING NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/070276 [patent_app_country] => US [patent_app_date] => 2011-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 17558 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20110170346.pdf [firstpage_image] =>[orig_patent_app_number] => 13070276 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/070276
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE, SIGNAL PROCESSING SYSTEM, METHOD FOR CONTROLLING SIGNAL PROCESSING SYSTEM, AND METHOD FOR REPROGRAMMING NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE Mar 22, 2011 Abandoned
Array ( [id] => 7485118 [patent_doc_number] => 20110235416 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/070092 [patent_app_country] => US [patent_app_date] => 2011-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5749 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20110235416.pdf [firstpage_image] =>[orig_patent_app_number] => 13070092 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/070092
Nonvolatile semiconductor memory device Mar 22, 2011 Issued
Array ( [id] => 7508762 [patent_doc_number] => 20110255360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-20 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR CONTROLLING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/070034 [patent_app_country] => US [patent_app_date] => 2011-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9060 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20110255360.pdf [firstpage_image] =>[orig_patent_app_number] => 13070034 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/070034
Semiconductor memory device with hidden refresh and method for controlling the same Mar 22, 2011 Issued
Array ( [id] => 9287741 [patent_doc_number] => 08644081 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-04 [patent_title] => 'Flash memory device and programming method thereof' [patent_app_type] => utility [patent_app_number] => 13/069778 [patent_app_country] => US [patent_app_date] => 2011-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4842 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13069778 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/069778
Flash memory device and programming method thereof Mar 22, 2011 Issued
Array ( [id] => 8415799 [patent_doc_number] => 20120243299 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-27 [patent_title] => 'POWER EFFICIENT DYNAMIC RANDOM ACCESS MEMORY DEVICES' [patent_app_type] => utility [patent_app_number] => 13/069504 [patent_app_country] => US [patent_app_date] => 2011-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3328 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13069504 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/069504
POWER EFFICIENT DYNAMIC RANDOM ACCESS MEMORY DEVICES Mar 22, 2011 Abandoned
Array ( [id] => 8871831 [patent_doc_number] => 08467213 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-06-18 [patent_title] => 'Power limiting in a content search system' [patent_app_type] => utility [patent_app_number] => 13/069220 [patent_app_country] => US [patent_app_date] => 2011-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 7670 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13069220 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/069220
Power limiting in a content search system Mar 21, 2011 Issued
Array ( [id] => 8877274 [patent_doc_number] => 08472246 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-25 [patent_title] => 'Method of programming a multi-bit per cell non-volatile memory' [patent_app_type] => utility [patent_app_number] => 13/053166 [patent_app_country] => US [patent_app_date] => 2011-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 21 [patent_no_of_words] => 3233 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13053166 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/053166
Method of programming a multi-bit per cell non-volatile memory Mar 20, 2011 Issued
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