Search

Hoai V. Ho

Examiner (ID: 15701)

Most Active Art Unit
2827
Art Unit(s)
2818, 2827, 2312, 2511
Total Applications
2584
Issued Applications
2371
Pending Applications
99
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7566198 [patent_doc_number] => 20110286261 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-24 [patent_title] => 'RESISTANCE CHANGE MEMORY' [patent_app_type] => utility [patent_app_number] => 13/021944 [patent_app_country] => US [patent_app_date] => 2011-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 25591 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0286/20110286261.pdf [firstpage_image] =>[orig_patent_app_number] => 13021944 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/021944
Resistance change memory including a resistive element Feb 6, 2011 Issued
Array ( [id] => 9116231 [patent_doc_number] => 08572423 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-10-29 [patent_title] => 'Reducing peak current in memory systems' [patent_app_type] => utility [patent_app_number] => 13/021754 [patent_app_country] => US [patent_app_date] => 2011-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4851 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13021754 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/021754
Reducing peak current in memory systems Feb 5, 2011 Issued
Array ( [id] => 6060655 [patent_doc_number] => 20110199838 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-18 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 13/021208 [patent_app_country] => US [patent_app_date] => 2011-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3588 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0199/20110199838.pdf [firstpage_image] =>[orig_patent_app_number] => 13021208 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/021208
Three dimensional semiconductor storage device having write drivers under a three dimensional memory cell array Feb 3, 2011 Issued
Array ( [id] => 8910931 [patent_doc_number] => 08483004 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-09 [patent_title] => 'Semiconductor device with transistor storing data by change in level of threshold voltage' [patent_app_type] => utility [patent_app_number] => 13/021168 [patent_app_country] => US [patent_app_date] => 2011-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 14040 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 286 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13021168 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/021168
Semiconductor device with transistor storing data by change in level of threshold voltage Feb 3, 2011 Issued
Array ( [id] => 6163463 [patent_doc_number] => 20110194360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-11 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF DETECTING ABNORMALITY ON SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/020518 [patent_app_country] => US [patent_app_date] => 2011-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9202 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20110194360.pdf [firstpage_image] =>[orig_patent_app_number] => 13020518 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/020518
Semiconductor device and method of detecting abnormality on semiconductor device Feb 2, 2011 Issued
Array ( [id] => 6163463 [patent_doc_number] => 20110194360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-11 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF DETECTING ABNORMALITY ON SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/020518 [patent_app_country] => US [patent_app_date] => 2011-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9202 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20110194360.pdf [firstpage_image] =>[orig_patent_app_number] => 13020518 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/020518
Semiconductor device and method of detecting abnormality on semiconductor device Feb 2, 2011 Issued
Array ( [id] => 8677005 [patent_doc_number] => 08385128 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-26 [patent_title] => 'Semiconductor memory' [patent_app_type] => utility [patent_app_number] => 13/020636 [patent_app_country] => US [patent_app_date] => 2011-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 12428 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13020636 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/020636
Semiconductor memory Feb 2, 2011 Issued
Array ( [id] => 6163463 [patent_doc_number] => 20110194360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-11 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF DETECTING ABNORMALITY ON SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/020518 [patent_app_country] => US [patent_app_date] => 2011-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9202 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20110194360.pdf [firstpage_image] =>[orig_patent_app_number] => 13020518 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/020518
Semiconductor device and method of detecting abnormality on semiconductor device Feb 2, 2011 Issued
Array ( [id] => 6163463 [patent_doc_number] => 20110194360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-11 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF DETECTING ABNORMALITY ON SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/020518 [patent_app_country] => US [patent_app_date] => 2011-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9202 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20110194360.pdf [firstpage_image] =>[orig_patent_app_number] => 13020518 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/020518
Semiconductor device and method of detecting abnormality on semiconductor device Feb 2, 2011 Issued
Array ( [id] => 8245940 [patent_doc_number] => 08203875 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-19 [patent_title] => 'Anti-parallel diode structure and method of fabrication' [patent_app_type] => utility [patent_app_number] => 13/014917 [patent_app_country] => US [patent_app_date] => 2011-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 25 [patent_no_of_words] => 4269 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/203/08203875.pdf [firstpage_image] =>[orig_patent_app_number] => 13014917 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/014917
Anti-parallel diode structure and method of fabrication Jan 26, 2011 Issued
Array ( [id] => 5999254 [patent_doc_number] => 20110116297 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-19 [patent_title] => 'Multi-layered memory devices' [patent_app_type] => utility [patent_app_number] => 12/929355 [patent_app_country] => US [patent_app_date] => 2011-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7470 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0116/20110116297.pdf [firstpage_image] =>[orig_patent_app_number] => 12929355 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/929355
Multi-layered memory devices Jan 18, 2011 Issued
Array ( [id] => 8983529 [patent_doc_number] => 08514653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-20 [patent_title] => 'Multi-layered memory devices' [patent_app_type] => utility [patent_app_number] => 12/929354 [patent_app_country] => US [patent_app_date] => 2011-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 7480 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12929354 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/929354
Multi-layered memory devices Jan 18, 2011 Issued
Array ( [id] => 6053812 [patent_doc_number] => 20110110172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-12 [patent_title] => 'Semiconductor device having resistance based memory array, method of reading and writing, and systems associated therewith' [patent_app_type] => utility [patent_app_number] => 12/929349 [patent_app_country] => US [patent_app_date] => 2011-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 11258 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20110110172.pdf [firstpage_image] =>[orig_patent_app_number] => 12929349 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/929349
Semiconductor device having resistance based memory array, method of reading and writing, and systems associated therewith Jan 17, 2011 Issued
Array ( [id] => 6036452 [patent_doc_number] => 20110089509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-21 [patent_title] => 'MAGNETIC MEMORY WITH SEPARATE READ AND WRITE PATHS' [patent_app_type] => utility [patent_app_number] => 12/974699 [patent_app_country] => US [patent_app_date] => 2010-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4230 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20110089509.pdf [firstpage_image] =>[orig_patent_app_number] => 12974699 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/974699
Magnetic memory with separate read and write paths Dec 20, 2010 Issued
Array ( [id] => 6037684 [patent_doc_number] => 20110090733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-21 [patent_title] => 'MEMORY WITH SEPARATE READ AND WRITE PATHS' [patent_app_type] => utility [patent_app_number] => 12/974679 [patent_app_country] => US [patent_app_date] => 2010-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9493 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20110090733.pdf [firstpage_image] =>[orig_patent_app_number] => 12974679 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/974679
Memory with separate read and write paths Dec 20, 2010 Issued
Array ( [id] => 4435906 [patent_doc_number] => 07969784 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-28 [patent_title] => 'Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells' [patent_app_type] => utility [patent_app_number] => 12/975178 [patent_app_country] => US [patent_app_date] => 2010-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 70 [patent_figures_cnt] => 81 [patent_no_of_words] => 61725 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/969/07969784.pdf [firstpage_image] =>[orig_patent_app_number] => 12975178 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/975178
Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells Dec 20, 2010 Issued
Array ( [id] => 6029424 [patent_doc_number] => 20110080786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-07 [patent_title] => 'DYNAMICALLY CONFIGURABLE MLC STATE ASSIGNMENT' [patent_app_type] => utility [patent_app_number] => 12/968529 [patent_app_country] => US [patent_app_date] => 2010-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7635 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20110080786.pdf [firstpage_image] =>[orig_patent_app_number] => 12968529 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/968529
Dynamically configurable MLC state assignment Dec 14, 2010 Issued
Array ( [id] => 8644132 [patent_doc_number] => 08369126 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-05 [patent_title] => 'Memory device, manufacturing method for memory device and method for data writing' [patent_app_type] => utility [patent_app_number] => 12/959298 [patent_app_country] => US [patent_app_date] => 2010-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6066 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12959298 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/959298
Memory device, manufacturing method for memory device and method for data writing Dec 1, 2010 Issued
Array ( [id] => 8702727 [patent_doc_number] => 08395953 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-12 [patent_title] => 'Bit-line sense amplifier, semiconductor memory device having the same, and method of testing bit-line micro-bridge defect' [patent_app_type] => utility [patent_app_number] => 12/958726 [patent_app_country] => US [patent_app_date] => 2010-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 8214 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12958726 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/958726
Bit-line sense amplifier, semiconductor memory device having the same, and method of testing bit-line micro-bridge defect Dec 1, 2010 Issued
Array ( [id] => 8798304 [patent_doc_number] => 08437182 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-07 [patent_title] => 'Reversible low-energy data storage in phase change memory' [patent_app_type] => utility [patent_app_number] => 12/958502 [patent_app_country] => US [patent_app_date] => 2010-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 7829 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12958502 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/958502
Reversible low-energy data storage in phase change memory Dec 1, 2010 Issued
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