Search

Hoai V. Ho

Examiner (ID: 15701)

Most Active Art Unit
2827
Art Unit(s)
2818, 2827, 2312, 2511
Total Applications
2584
Issued Applications
2371
Pending Applications
99
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8750772 [patent_doc_number] => 08416610 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-09 [patent_title] => 'Systems and devices including local data lines and methods of using, making, and operating the same' [patent_app_type] => utility [patent_app_number] => 12/792557 [patent_app_country] => US [patent_app_date] => 2010-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 23 [patent_no_of_words] => 8941 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12792557 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/792557
Systems and devices including local data lines and methods of using, making, and operating the same Jun 1, 2010 Issued
Array ( [id] => 7585572 [patent_doc_number] => 20110280082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-17 [patent_title] => 'NON-VOLATILE MEMORY PROGRAMMING' [patent_app_type] => utility [patent_app_number] => 12/778838 [patent_app_country] => US [patent_app_date] => 2010-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10135 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0280/20110280082.pdf [firstpage_image] =>[orig_patent_app_number] => 12778838 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/778838
Non-volatile memory programming May 11, 2010 Issued
Array ( [id] => 8714708 [patent_doc_number] => 08400853 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-19 [patent_title] => 'Semiconductor chip and method of repair design of the same' [patent_app_type] => utility [patent_app_number] => 12/778120 [patent_app_country] => US [patent_app_date] => 2010-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 8287 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12778120 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/778120
Semiconductor chip and method of repair design of the same May 11, 2010 Issued
Array ( [id] => 7585585 [patent_doc_number] => 20110280095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-17 [patent_title] => 'MEMORY CIRCUITS HAVING A PLURALITY OF KEEPERS' [patent_app_type] => utility [patent_app_number] => 12/778714 [patent_app_country] => US [patent_app_date] => 2010-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4751 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0280/20110280095.pdf [firstpage_image] =>[orig_patent_app_number] => 12778714 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/778714
Memory circuits having a plurality of keepers May 11, 2010 Issued
Array ( [id] => 7585555 [patent_doc_number] => 20110280065 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-17 [patent_title] => 'Write Energy Conservation In Memory' [patent_app_type] => utility [patent_app_number] => 12/777468 [patent_app_country] => US [patent_app_date] => 2010-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3791 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0280/20110280065.pdf [firstpage_image] =>[orig_patent_app_number] => 12777468 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/777468
Write energy conservation in memory May 10, 2010 Issued
Array ( [id] => 6571420 [patent_doc_number] => 20100290295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-18 [patent_title] => 'SEMICONDUCTOR MEMORY AND SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/776744 [patent_app_country] => US [patent_app_date] => 2010-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 12656 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0290/20100290295.pdf [firstpage_image] =>[orig_patent_app_number] => 12776744 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/776744
Semiconductor memory and system May 9, 2010 Issued
Array ( [id] => 6571284 [patent_doc_number] => 20100290283 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-18 [patent_title] => 'Programming Method for Flash Memory Device' [patent_app_type] => utility [patent_app_number] => 12/776620 [patent_app_country] => US [patent_app_date] => 2010-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3860 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0290/20100290283.pdf [firstpage_image] =>[orig_patent_app_number] => 12776620 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/776620
Programming method for flash memory device May 9, 2010 Issued
Array ( [id] => 6385277 [patent_doc_number] => 20100302893 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-02 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE, MEMORY CONTROLLER THAT CONTROLS THE SAME, AND INFORMATION PROCESSING SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/776964 [patent_app_country] => US [patent_app_date] => 2010-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6667 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20100302893.pdf [firstpage_image] =>[orig_patent_app_number] => 12776964 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/776964
Semiconductor memory device, memory controller that controls the same, and information processing system May 9, 2010 Issued
Array ( [id] => 6464690 [patent_doc_number] => 20100284227 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-11 [patent_title] => 'METHOD OF OPERATING NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/775562 [patent_app_country] => US [patent_app_date] => 2010-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 12157 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20100284227.pdf [firstpage_image] =>[orig_patent_app_number] => 12775562 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/775562
Method of operating nonvolatile memory device controlled by controlling coupling resistance value between a bit line and a page buffer May 6, 2010 Issued
Array ( [id] => 9577065 [patent_doc_number] => 08767492 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-01 [patent_title] => 'Methods and systems to read register files with un-clocked read wordlines and clocked bitlines, and to pre-charge a biteline to a configurable voltage' [patent_app_type] => utility [patent_app_number] => 12/776264 [patent_app_country] => US [patent_app_date] => 2010-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 7634 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12776264 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/776264
Methods and systems to read register files with un-clocked read wordlines and clocked bitlines, and to pre-charge a biteline to a configurable voltage May 6, 2010 Issued
Array ( [id] => 8835878 [patent_doc_number] => 08451643 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-28 [patent_title] => 'Semiconductor memory device rewriting data after execution of multiple read operations' [patent_app_type] => utility [patent_app_number] => 12/775744 [patent_app_country] => US [patent_app_date] => 2010-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 5998 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12775744 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/775744
Semiconductor memory device rewriting data after execution of multiple read operations May 6, 2010 Issued
Array ( [id] => 8835878 [patent_doc_number] => 08451643 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-28 [patent_title] => 'Semiconductor memory device rewriting data after execution of multiple read operations' [patent_app_type] => utility [patent_app_number] => 12/775744 [patent_app_country] => US [patent_app_date] => 2010-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 5998 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12775744 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/775744
Semiconductor memory device rewriting data after execution of multiple read operations May 6, 2010 Issued
Array ( [id] => 8398755 [patent_doc_number] => 08269142 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-18 [patent_title] => 'Weld current generating apparatus' [patent_app_type] => utility [patent_app_number] => 12/774743 [patent_app_country] => US [patent_app_date] => 2010-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1302 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12774743 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/774743
Weld current generating apparatus May 5, 2010 Issued
Array ( [id] => 8726904 [patent_doc_number] => 08406039 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-26 [patent_title] => 'Low-leakage power supply architecture for an SRAM array' [patent_app_type] => utility [patent_app_number] => 12/775220 [patent_app_country] => US [patent_app_date] => 2010-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3785 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12775220 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/775220
Low-leakage power supply architecture for an SRAM array May 5, 2010 Issued
Array ( [id] => 6483835 [patent_doc_number] => 20100208513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-19 [patent_title] => 'MEMORY WITH SEPARATE READ AND WRITE PATHS' [patent_app_type] => utility [patent_app_number] => 12/774016 [patent_app_country] => US [patent_app_date] => 2010-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9493 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0208/20100208513.pdf [firstpage_image] =>[orig_patent_app_number] => 12774016 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/774016
Memory with separate read and write paths May 4, 2010 Issued
Array ( [id] => 8204637 [patent_doc_number] => 08189414 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-29 [patent_title] => 'Maintenance of amplified signals using high-voltage-threshold transistors' [patent_app_type] => utility [patent_app_number] => 12/772681 [patent_app_country] => US [patent_app_date] => 2010-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2776 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/189/08189414.pdf [firstpage_image] =>[orig_patent_app_number] => 12772681 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/772681
Maintenance of amplified signals using high-voltage-threshold transistors May 2, 2010 Issued
Array ( [id] => 7570614 [patent_doc_number] => 20110266269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-03 [patent_title] => 'COMMON TOOL CENTER POINT CONSUMABLES' [patent_app_type] => utility [patent_app_number] => 12/771747 [patent_app_country] => US [patent_app_date] => 2010-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2715 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0266/20110266269.pdf [firstpage_image] =>[orig_patent_app_number] => 12771747 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/771747
Common tool center point consumables Apr 29, 2010 Issued
Array ( [id] => 6491504 [patent_doc_number] => 20100214821 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-26 [patent_title] => 'CAPACITIVE DIVIDER SENSING OF MEMORY CELLS' [patent_app_type] => utility [patent_app_number] => 12/770362 [patent_app_country] => US [patent_app_date] => 2010-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11133 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20100214821.pdf [firstpage_image] =>[orig_patent_app_number] => 12770362 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/770362
Capacitive divider sensing of memory cells Apr 28, 2010 Issued
Array ( [id] => 6491883 [patent_doc_number] => 20100214856 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-26 [patent_title] => 'Method to improve the write speed for memory products' [patent_app_type] => utility [patent_app_number] => 12/799335 [patent_app_country] => US [patent_app_date] => 2010-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8673 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20100214856.pdf [firstpage_image] =>[orig_patent_app_number] => 12799335 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/799335
Method to improve the write speed for memory products Apr 21, 2010 Issued
Array ( [id] => 8675878 [patent_doc_number] => 08383992 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-26 [patent_title] => 'NTC/PTC heating pad' [patent_app_type] => utility [patent_app_number] => 12/764698 [patent_app_country] => US [patent_app_date] => 2010-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 8819 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12764698 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/764698
NTC/PTC heating pad Apr 20, 2010 Issued
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