Search

Hoai V. Ho

Examiner (ID: 15701)

Most Active Art Unit
2827
Art Unit(s)
2818, 2827, 2312, 2511
Total Applications
2584
Issued Applications
2371
Pending Applications
99
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6508148 [patent_doc_number] => 20100202188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-12 [patent_title] => 'Low read current architecture for memory' [patent_app_type] => utility [patent_app_number] => 12/799168 [patent_app_country] => US [patent_app_date] => 2010-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5404 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20100202188.pdf [firstpage_image] =>[orig_patent_app_number] => 12799168 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/799168
Low read current architecture for memory Apr 18, 2010 Issued
Array ( [id] => 7506123 [patent_doc_number] => 20110253701 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-20 [patent_title] => 'HIGH TEMPERATURE CONNECTOR AND METHOD FOR MANUFACTURING' [patent_app_type] => utility [patent_app_number] => 12/761614 [patent_app_country] => US [patent_app_date] => 2010-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3936 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20110253701.pdf [firstpage_image] =>[orig_patent_app_number] => 12761614 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/761614
High temperature connector and method for manufacturing Apr 15, 2010 Issued
Array ( [id] => 7504981 [patent_doc_number] => 20110252984 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-20 [patent_title] => 'Temperature Sensor for a Food Holding Cabinet' [patent_app_type] => utility [patent_app_number] => 12/759760 [patent_app_country] => US [patent_app_date] => 2010-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5341 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0252/20110252984.pdf [firstpage_image] =>[orig_patent_app_number] => 12759760 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/759760
Temperature sensor for a food holding cabinet Apr 13, 2010 Issued
Array ( [id] => 6152379 [patent_doc_number] => 20110155717 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'TEMPERATURE CONTROL CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/755400 [patent_app_country] => US [patent_app_date] => 2010-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2169 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20110155717.pdf [firstpage_image] =>[orig_patent_app_number] => 12755400 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/755400
Temperature control circuit Apr 5, 2010 Issued
Array ( [id] => 8341589 [patent_doc_number] => 08243517 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-14 [patent_title] => 'Nonvolatile semiconductor memory, method for reading out thereof, and memory card' [patent_app_type] => utility [patent_app_number] => 12/730330 [patent_app_country] => US [patent_app_date] => 2010-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 13022 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12730330 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/730330
Nonvolatile semiconductor memory, method for reading out thereof, and memory card Mar 23, 2010 Issued
Array ( [id] => 6267383 [patent_doc_number] => 20100254207 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-07 [patent_title] => 'Non-Volatile Memory Device with Plural Reference Cells, and Method of Setting the Reference Cells' [patent_app_type] => utility [patent_app_number] => 12/725370 [patent_app_country] => US [patent_app_date] => 2010-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4209 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20100254207.pdf [firstpage_image] =>[orig_patent_app_number] => 12725370 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/725370
Non-volatile memory device with plural reference cells, and method of setting the reference cells Mar 15, 2010 Issued
Array ( [id] => 4645710 [patent_doc_number] => 08023321 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-20 [patent_title] => 'Flash memory program inhibit scheme' [patent_app_type] => utility [patent_app_number] => 12/719413 [patent_app_country] => US [patent_app_date] => 2010-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 10279 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/023/08023321.pdf [firstpage_image] =>[orig_patent_app_number] => 12719413 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/719413
Flash memory program inhibit scheme Mar 7, 2010 Issued
Array ( [id] => 6117769 [patent_doc_number] => 20110075489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-31 [patent_title] => 'NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/718428 [patent_app_country] => US [patent_app_date] => 2010-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4838 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0075/20110075489.pdf [firstpage_image] =>[orig_patent_app_number] => 12718428 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/718428
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE Mar 4, 2010 Abandoned
Array ( [id] => 6233439 [patent_doc_number] => 20100265770 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-21 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY' [patent_app_type] => utility [patent_app_number] => 12/718434 [patent_app_country] => US [patent_app_date] => 2010-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 11042 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0265/20100265770.pdf [firstpage_image] =>[orig_patent_app_number] => 12718434 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/718434
Nonvolatile semiconductor memory Mar 4, 2010 Issued
Array ( [id] => 8644184 [patent_doc_number] => 08369177 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-05 [patent_title] => 'Techniques for reading from and/or writing to a semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/718310 [patent_app_country] => US [patent_app_date] => 2010-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 26 [patent_no_of_words] => 25849 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12718310 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/718310
Techniques for reading from and/or writing to a semiconductor memory device Mar 4, 2010 Issued
Array ( [id] => 6289524 [patent_doc_number] => 20100238699 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-23 [patent_title] => 'SEMICONDUCTOR MEMORY AND TEST METHOD FOR THE SEMICONDUCOR MEMORY' [patent_app_type] => utility [patent_app_number] => 12/718800 [patent_app_country] => US [patent_app_date] => 2010-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4892 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20100238699.pdf [firstpage_image] =>[orig_patent_app_number] => 12718800 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/718800
Semiconductor memory and test method for the semiconductor memory Mar 4, 2010 Issued
Array ( [id] => 6537105 [patent_doc_number] => 20100232196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-16 [patent_title] => 'MULTI-CHIP PACKAGE SEMICONDUCTOR MEMORY DEVICE PROVIDING ACTIVE TERMINATION CONTROL' [patent_app_type] => utility [patent_app_number] => 12/717246 [patent_app_country] => US [patent_app_date] => 2010-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2972 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0232/20100232196.pdf [firstpage_image] =>[orig_patent_app_number] => 12717246 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/717246
Multi-chip package semiconductor memory device providing active termination control Mar 3, 2010 Issued
Array ( [id] => 6289637 [patent_doc_number] => 20100238736 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-23 [patent_title] => 'Semiconductor storage device' [patent_app_type] => utility [patent_app_number] => 12/659092 [patent_app_country] => US [patent_app_date] => 2010-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9473 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20100238736.pdf [firstpage_image] =>[orig_patent_app_number] => 12659092 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/659092
Semiconductor storage device Feb 24, 2010 Abandoned
Array ( [id] => 8459438 [patent_doc_number] => 08295114 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-23 [patent_title] => 'Semiconductor memory cell array including dummy bit-line and word-line and semiconductor memory device having the same' [patent_app_type] => utility [patent_app_number] => 12/656984 [patent_app_country] => US [patent_app_date] => 2010-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 9307 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12656984 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/656984
Semiconductor memory cell array including dummy bit-line and word-line and semiconductor memory device having the same Feb 21, 2010 Issued
Array ( [id] => 8084609 [patent_doc_number] => 08149632 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-03 [patent_title] => 'Output circuit for a semiconductor memory device and data output method' [patent_app_type] => utility [patent_app_number] => 12/707140 [patent_app_country] => US [patent_app_date] => 2010-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10682 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/149/08149632.pdf [firstpage_image] =>[orig_patent_app_number] => 12707140 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/707140
Output circuit for a semiconductor memory device and data output method Feb 16, 2010 Issued
Array ( [id] => 8411417 [patent_doc_number] => 08274819 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-25 [patent_title] => 'Read disturb free SMT MRAM reference cell circuit' [patent_app_type] => utility [patent_app_number] => 12/658228 [patent_app_country] => US [patent_app_date] => 2010-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4588 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12658228 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/658228
Read disturb free SMT MRAM reference cell circuit Feb 3, 2010 Issued
Array ( [id] => 8459413 [patent_doc_number] => 08295089 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-23 [patent_title] => 'Non-volatile memory device having vertical structure and method of operating the same' [patent_app_type] => utility [patent_app_number] => 12/658072 [patent_app_country] => US [patent_app_date] => 2010-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 7625 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12658072 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/658072
Non-volatile memory device having vertical structure and method of operating the same Feb 1, 2010 Issued
Array ( [id] => 6108511 [patent_doc_number] => 20110188282 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-04 [patent_title] => 'Memory architectures and techniques to enhance throughput for cross-point arrays' [patent_app_type] => utility [patent_app_number] => 12/658138 [patent_app_country] => US [patent_app_date] => 2010-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6776 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20110188282.pdf [firstpage_image] =>[orig_patent_app_number] => 12658138 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/658138
Memory architectures and techniques to enhance throughput for cross-point arrays Feb 1, 2010 Issued
Array ( [id] => 6421126 [patent_doc_number] => 20100142255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-10 [patent_title] => 'METHOD TO PROGRAM A MEMORY CELL COMPRISING A CARBON NANOTUBE FABRIC ELEMENT AND A STEERING ELEMENT' [patent_app_type] => utility [patent_app_number] => 12/693782 [patent_app_country] => US [patent_app_date] => 2010-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7243 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20100142255.pdf [firstpage_image] =>[orig_patent_app_number] => 12693782 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/693782
Method to program a memory cell comprising a carbon nanotube fabric element and a steering element Jan 25, 2010 Issued
Array ( [id] => 6267284 [patent_doc_number] => 20100254179 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-07 [patent_title] => 'DRAM including pseudo negative word line' [patent_app_type] => utility [patent_app_number] => 12/689228 [patent_app_country] => US [patent_app_date] => 2010-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8992 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20100254179.pdf [firstpage_image] =>[orig_patent_app_number] => 12689228 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/689228
DRAM including pseudo negative word line Jan 18, 2010 Issued
Menu