
Hoai V. Ho
Examiner (ID: 15701)
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2818, 2827, 2312, 2511 |
| Total Applications | 2584 |
| Issued Applications | 2371 |
| Pending Applications | 99 |
| Abandoned Applications | 149 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4823170
[patent_doc_number] => 20080123425
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-29
[patent_title] => 'REDUCING PROGRAM DISTURB IN NON-VOLATILE MEMORY USING MULTIPLE BOOSTING MODES'
[patent_app_type] => utility
[patent_app_number] => 11/555850
[patent_app_country] => US
[patent_app_date] => 2006-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 14430
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0123/20080123425.pdf
[firstpage_image] =>[orig_patent_app_number] => 11555850
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/555850 | Reducing program disturb in non-volatile memory using multiple boosting modes | Nov 1, 2006 | Issued |
Array
(
[id] => 564418
[patent_doc_number] => 07468911
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-12-23
[patent_title] => 'Non-volatile memory using multiple boosting modes for reduced program disturb'
[patent_app_type] => utility
[patent_app_number] => 11/555856
[patent_app_country] => US
[patent_app_date] => 2006-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 29
[patent_no_of_words] => 14485
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/468/07468911.pdf
[firstpage_image] =>[orig_patent_app_number] => 11555856
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/555856 | Non-volatile memory using multiple boosting modes for reduced program disturb | Nov 1, 2006 | Issued |
Array
(
[id] => 4902819
[patent_doc_number] => 20080112232
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-15
[patent_title] => 'Method and Apparatus for Fast Programming of Nonvolatile Memory'
[patent_app_type] => utility
[patent_app_number] => 11/555620
[patent_app_country] => US
[patent_app_date] => 2006-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3352
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0112/20080112232.pdf
[firstpage_image] =>[orig_patent_app_number] => 11555620
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/555620 | Method and apparatus for fast programming of memory | Oct 31, 2006 | Issued |
Array
(
[id] => 800978
[patent_doc_number] => 07426131
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-09-16
[patent_title] => 'Programmable memory device circuit'
[patent_app_type] => utility
[patent_app_number] => 11/555560
[patent_app_country] => US
[patent_app_date] => 2006-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4055
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/426/07426131.pdf
[firstpage_image] =>[orig_patent_app_number] => 11555560
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/555560 | Programmable memory device circuit | Oct 31, 2006 | Issued |
Array
(
[id] => 593324
[patent_doc_number] => 07447082
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-11-04
[patent_title] => 'Method for operating single-poly non-volatile memory device'
[patent_app_type] => utility
[patent_app_number] => 11/555676
[patent_app_country] => US
[patent_app_date] => 2006-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6600
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 298
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/447/07447082.pdf
[firstpage_image] =>[orig_patent_app_number] => 11555676
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/555676 | Method for operating single-poly non-volatile memory device | Oct 31, 2006 | Issued |
Array
(
[id] => 5214933
[patent_doc_number] => 20070104013
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-05-10
[patent_title] => 'Apparatus for controlling column selecting signal of semiconductor memory apparatus and method of controlling the same'
[patent_app_type] => utility
[patent_app_number] => 11/589811
[patent_app_country] => US
[patent_app_date] => 2006-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2340
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0104/20070104013.pdf
[firstpage_image] =>[orig_patent_app_number] => 11589811
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/589811 | Apparatus for controlling column selecting signal of semiconductor memory apparatus and method of controlling the same | Oct 30, 2006 | Issued |
Array
(
[id] => 240560
[patent_doc_number] => 07593282
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-09-22
[patent_title] => 'Memory core with single contacts and semiconductor memory device having the same'
[patent_app_type] => utility
[patent_app_number] => 11/590313
[patent_app_country] => US
[patent_app_date] => 2006-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 7643
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 291
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/593/07593282.pdf
[firstpage_image] =>[orig_patent_app_number] => 11590313
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/590313 | Memory core with single contacts and semiconductor memory device having the same | Oct 30, 2006 | Issued |
Array
(
[id] => 5033215
[patent_doc_number] => 20070097754
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-05-03
[patent_title] => 'VOLTAGE REGULATOR FOR A BIT LINE OF A SEMICONDUCTOR MEMORY CELL'
[patent_app_type] => utility
[patent_app_number] => 11/554868
[patent_app_country] => US
[patent_app_date] => 2006-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4453
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0097/20070097754.pdf
[firstpage_image] =>[orig_patent_app_number] => 11554868
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/554868 | Voltage regulator for a bit line of a semiconductor memory cell | Oct 30, 2006 | Issued |
Array
(
[id] => 5190322
[patent_doc_number] => 20070168631
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-19
[patent_title] => 'Semiconductor memory device and methods thereof'
[patent_app_type] => utility
[patent_app_number] => 11/589179
[patent_app_country] => US
[patent_app_date] => 2006-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4582
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0168/20070168631.pdf
[firstpage_image] =>[orig_patent_app_number] => 11589179
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/589179 | Semiconductor memory device with a data output circuit configured to output stored data during a first type of read operation and configured to output at least one data pattern during a second type of read operation and methods thereof | Oct 29, 2006 | Issued |
Array
(
[id] => 4902801
[patent_doc_number] => 20080112214
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-15
[patent_title] => 'Electronic assembly having magnetic tunnel junction voltage sensors and method for forming the same'
[patent_app_type] => utility
[patent_app_number] => 11/590276
[patent_app_country] => US
[patent_app_date] => 2006-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5351
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0112/20080112214.pdf
[firstpage_image] =>[orig_patent_app_number] => 11590276
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/590276 | Electronic assembly having magnetic tunnel junction voltage sensors and method for forming the same | Oct 29, 2006 | Abandoned |
Array
(
[id] => 4902830
[patent_doc_number] => 20080112243
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-15
[patent_title] => 'MEMORY BUS OUTPUT DRIVER OF A MULTI-BANK MEMORY DEVICE AND METHOD THEREFOR'
[patent_app_type] => utility
[patent_app_number] => 11/554522
[patent_app_country] => US
[patent_app_date] => 2006-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8053
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0112/20080112243.pdf
[firstpage_image] =>[orig_patent_app_number] => 11554522
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/554522 | Memory bus output driver of a multi-bank memory device and method therefor | Oct 29, 2006 | Issued |
Array
(
[id] => 589351
[patent_doc_number] => 07453757
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-11-18
[patent_title] => 'Apparatus and method of controlling bank of semiconductor memory'
[patent_app_type] => utility
[patent_app_number] => 11/588295
[patent_app_country] => US
[patent_app_date] => 2006-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3258
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/453/07453757.pdf
[firstpage_image] =>[orig_patent_app_number] => 11588295
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/588295 | Apparatus and method of controlling bank of semiconductor memory | Oct 26, 2006 | Issued |
Array
(
[id] => 4969876
[patent_doc_number] => 20070109878
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-05-17
[patent_title] => 'MEMORY DEVICE WITH IMPROVED WRITING CAPABILITIES'
[patent_app_type] => utility
[patent_app_number] => 11/553094
[patent_app_country] => US
[patent_app_date] => 2006-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5525
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0109/20070109878.pdf
[firstpage_image] =>[orig_patent_app_number] => 11553094
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/553094 | Memory device with improved writing capabilities | Oct 25, 2006 | Issued |
Array
(
[id] => 4892042
[patent_doc_number] => 20080101139
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-01
[patent_title] => 'Memory access strobe configuration system and process'
[patent_app_type] => utility
[patent_app_number] => 11/586057
[patent_app_country] => US
[patent_app_date] => 2006-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3449
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0101/20080101139.pdf
[firstpage_image] =>[orig_patent_app_number] => 11586057
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/586057 | Memory access strobe configuration system and process | Oct 24, 2006 | Issued |
Array
(
[id] => 4964147
[patent_doc_number] => 20080106967
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-08
[patent_title] => 'METHOD AND APPARATUS FOR COMMUNICATING COMMAND AND ADDRESS SIGNALS'
[patent_app_type] => utility
[patent_app_number] => 11/552752
[patent_app_country] => US
[patent_app_date] => 2006-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4968
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0106/20080106967.pdf
[firstpage_image] =>[orig_patent_app_number] => 11552752
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/552752 | Method and apparatus for communicating command and address signals | Oct 24, 2006 | Issued |
Array
(
[id] => 349869
[patent_doc_number] => 07495993
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-02-24
[patent_title] => 'Onboard data storage and method'
[patent_app_type] => utility
[patent_app_number] => 11/552880
[patent_app_country] => US
[patent_app_date] => 2006-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 8362
[patent_no_of_claims] => 38
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/495/07495993.pdf
[firstpage_image] =>[orig_patent_app_number] => 11552880
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/552880 | Onboard data storage and method | Oct 24, 2006 | Issued |
Array
(
[id] => 248047
[patent_doc_number] => 07586804
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-09-08
[patent_title] => 'Memory core, memory device including a memory core, and method thereof testing a memory core'
[patent_app_type] => utility
[patent_app_number] => 11/584565
[patent_app_country] => US
[patent_app_date] => 2006-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6141
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/586/07586804.pdf
[firstpage_image] =>[orig_patent_app_number] => 11584565
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/584565 | Memory core, memory device including a memory core, and method thereof testing a memory core | Oct 22, 2006 | Issued |
Array
(
[id] => 5036510
[patent_doc_number] => 20070101049
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-05-03
[patent_title] => 'Redundant purge for flash storage device'
[patent_app_type] => utility
[patent_app_number] => 11/582782
[patent_app_country] => US
[patent_app_date] => 2006-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6926
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0101/20070101049.pdf
[firstpage_image] =>[orig_patent_app_number] => 11582782
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/582782 | Redundant purge for flash storage device | Oct 16, 2006 | Abandoned |
Array
(
[id] => 5033214
[patent_doc_number] => 20070097753
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-05-03
[patent_title] => 'Memory device, memory system and method of inputting/outputting data into/from the same'
[patent_app_type] => utility
[patent_app_number] => 11/582290
[patent_app_country] => US
[patent_app_date] => 2006-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4721
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0097/20070097753.pdf
[firstpage_image] =>[orig_patent_app_number] => 11582290
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/582290 | Memory device, memory system and method of inputting/outputting data into/from the same | Oct 16, 2006 | Issued |
Array
(
[id] => 4984346
[patent_doc_number] => 20070088905
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-04-19
[patent_title] => 'System and method for purging a flash storage device'
[patent_app_type] => utility
[patent_app_number] => 11/582792
[patent_app_country] => US
[patent_app_date] => 2006-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6907
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0088/20070088905.pdf
[firstpage_image] =>[orig_patent_app_number] => 11582792
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/582792 | System and method for purging a flash storage device | Oct 16, 2006 | Abandoned |