Search

Hoai V. Ho

Examiner (ID: 15701)

Most Active Art Unit
2827
Art Unit(s)
2818, 2827, 2312, 2511
Total Applications
2584
Issued Applications
2371
Pending Applications
99
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5752550 [patent_doc_number] => 20060221699 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-05 [patent_title] => 'Nonvolatile semiconductor memory' [patent_app_type] => utility [patent_app_number] => 11/378248 [patent_app_country] => US [patent_app_date] => 2006-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11653 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0221/20060221699.pdf [firstpage_image] =>[orig_patent_app_number] => 11378248 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/378248
Nonvolatile semiconductor memory Mar 19, 2006 Issued
Array ( [id] => 591883 [patent_doc_number] => 07450409 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-11-11 [patent_title] => 'Content addressable memory (CAM) cell having column-wise conditional data pre-write' [patent_app_type] => utility [patent_app_number] => 11/384736 [patent_app_country] => US [patent_app_date] => 2006-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6823 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/450/07450409.pdf [firstpage_image] =>[orig_patent_app_number] => 11384736 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/384736
Content addressable memory (CAM) cell having column-wise conditional data pre-write Mar 19, 2006 Issued
Array ( [id] => 5595033 [patent_doc_number] => 20060158949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-20 [patent_title] => 'Method and system for controlling refresh to avoid memory cell data losses' [patent_app_type] => utility [patent_app_number] => 11/377988 [patent_app_country] => US [patent_app_date] => 2006-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5443 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20060158949.pdf [firstpage_image] =>[orig_patent_app_number] => 11377988 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/377988
Method and system for controlling refresh to avoid memory cell data losses Mar 16, 2006 Issued
Array ( [id] => 858747 [patent_doc_number] => 07375998 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-20 [patent_title] => 'Ferroelectric random access memory circuits for guarding against operation with out-of-range voltages and methods of operating same' [patent_app_type] => utility [patent_app_number] => 11/378726 [patent_app_country] => US [patent_app_date] => 2006-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3351 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/375/07375998.pdf [firstpage_image] =>[orig_patent_app_number] => 11378726 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/378726
Ferroelectric random access memory circuits for guarding against operation with out-of-range voltages and methods of operating same Mar 16, 2006 Issued
Array ( [id] => 5692843 [patent_doc_number] => 20060152989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-13 [patent_title] => 'Method and system for controlling refresh to avoid memory cell data losses' [patent_app_type] => utility [patent_app_number] => 11/378777 [patent_app_country] => US [patent_app_date] => 2006-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5443 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20060152989.pdf [firstpage_image] =>[orig_patent_app_number] => 11378777 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/378777
Method and system for controlling refresh to avoid memory cell data losses Mar 16, 2006 Issued
Array ( [id] => 5595034 [patent_doc_number] => 20060158950 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-20 [patent_title] => 'Method and system for controlling refresh to avoid memory cell data losses' [patent_app_type] => utility [patent_app_number] => 11/378898 [patent_app_country] => US [patent_app_date] => 2006-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5443 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20060158950.pdf [firstpage_image] =>[orig_patent_app_number] => 11378898 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/378898
Method and system for controlling refresh to avoid memory cell data losses Mar 16, 2006 Issued
Array ( [id] => 4976027 [patent_doc_number] => 20070217258 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-20 [patent_title] => 'Bit symbol recognition method and structure for multiple bit storage in non-volatile memories' [patent_app_type] => utility [patent_app_number] => 11/378074 [patent_app_country] => US [patent_app_date] => 2006-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9951 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20070217258.pdf [firstpage_image] =>[orig_patent_app_number] => 11378074 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/378074
Bit symbol recognition method and structure for multiple bit storage in non-volatile memories Mar 15, 2006 Issued
Array ( [id] => 5698784 [patent_doc_number] => 20060215468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-28 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/378214 [patent_app_country] => US [patent_app_date] => 2006-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5124 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0215/20060215468.pdf [firstpage_image] =>[orig_patent_app_number] => 11378214 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/378214
Semiconductor memory device Mar 15, 2006 Issued
Array ( [id] => 5856415 [patent_doc_number] => 20060227629 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-12 [patent_title] => 'Memory device and control method therefor' [patent_app_type] => utility [patent_app_number] => 11/378444 [patent_app_country] => US [patent_app_date] => 2006-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8127 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20060227629.pdf [firstpage_image] =>[orig_patent_app_number] => 11378444 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/378444
Memory device and control method therefor Mar 15, 2006 Issued
Array ( [id] => 5758640 [patent_doc_number] => 20060209585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-21 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/376202 [patent_app_country] => US [patent_app_date] => 2006-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 42 [patent_no_of_words] => 39382 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0209/20060209585.pdf [firstpage_image] =>[orig_patent_app_number] => 11376202 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/376202
Nonvolatile semiconductor memory device Mar 15, 2006 Issued
Array ( [id] => 395090 [patent_doc_number] => 07298635 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-11-20 [patent_title] => 'Content addressable memory (CAM) cell with single ended write multiplexing' [patent_app_type] => utility [patent_app_number] => 11/376764 [patent_app_country] => US [patent_app_date] => 2006-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5772 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/298/07298635.pdf [firstpage_image] =>[orig_patent_app_number] => 11376764 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/376764
Content addressable memory (CAM) cell with single ended write multiplexing Mar 14, 2006 Issued
Array ( [id] => 891269 [patent_doc_number] => 07349232 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-25 [patent_title] => '6F2 DRAM cell design with 3F-pitch folded digitline sense amplifier' [patent_app_type] => utility [patent_app_number] => 11/376458 [patent_app_country] => US [patent_app_date] => 2006-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4351 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/349/07349232.pdf [firstpage_image] =>[orig_patent_app_number] => 11376458 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/376458
6F2 DRAM cell design with 3F-pitch folded digitline sense amplifier Mar 14, 2006 Issued
Array ( [id] => 5003730 [patent_doc_number] => 20070201297 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-30 [patent_title] => 'Multi-port memory device and method of controlling the same' [patent_app_type] => utility [patent_app_number] => 11/375568 [patent_app_country] => US [patent_app_date] => 2006-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3814 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20070201297.pdf [firstpage_image] =>[orig_patent_app_number] => 11375568 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/375568
Multi-port memory device and method of controlling the same Mar 14, 2006 Issued
Array ( [id] => 5692826 [patent_doc_number] => 20060152972 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-13 [patent_title] => 'Thin film magnetic memory device conducting read operation by a self-reference method' [patent_app_type] => utility [patent_app_number] => 11/374063 [patent_app_country] => US [patent_app_date] => 2006-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12663 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20060152972.pdf [firstpage_image] =>[orig_patent_app_number] => 11374063 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/374063
Thin film magnetic memory device conducting read operation by a self-reference method Mar 13, 2006 Issued
Array ( [id] => 5420312 [patent_doc_number] => 20090146767 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-11 [patent_title] => 'Ferromagnetic Nanorings, Mediums Embodying Same Including Devices and Methods Related Thereto' [patent_app_type] => utility [patent_app_number] => 11/885846 [patent_app_country] => US [patent_app_date] => 2006-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4868 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0146/20090146767.pdf [firstpage_image] =>[orig_patent_app_number] => 11885846 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/885846
Ferromagnetic nanorings, mediums embodying same including devices and methods related thereto Mar 13, 2006 Issued
Array ( [id] => 449195 [patent_doc_number] => 07254088 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-07 [patent_title] => 'Semiconductor memory' [patent_app_type] => utility [patent_app_number] => 11/338670 [patent_app_country] => US [patent_app_date] => 2006-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 11163 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/254/07254088.pdf [firstpage_image] =>[orig_patent_app_number] => 11338670 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/338670
Semiconductor memory Jan 24, 2006 Issued
Array ( [id] => 5681913 [patent_doc_number] => 20060198183 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-07 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/337648 [patent_app_country] => US [patent_app_date] => 2006-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8564 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20060198183.pdf [firstpage_image] =>[orig_patent_app_number] => 11337648 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/337648
Semiconductor device Jan 23, 2006 Abandoned
Array ( [id] => 5871345 [patent_doc_number] => 20060164881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Static semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/337558 [patent_app_country] => US [patent_app_date] => 2006-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 15860 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20060164881.pdf [firstpage_image] =>[orig_patent_app_number] => 11337558 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/337558
Semiconductor memory device having reduced leakage current Jan 23, 2006 Issued
Array ( [id] => 5671371 [patent_doc_number] => 20060176725 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-10 [patent_title] => 'PMC memory circuit and method for storing a datum in a PMC memory circuit' [patent_app_type] => utility [patent_app_number] => 11/337940 [patent_app_country] => US [patent_app_date] => 2006-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3307 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20060176725.pdf [firstpage_image] =>[orig_patent_app_number] => 11337940 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/337940
PMC memory circuit and method for storing a datum in a PMC memory circuit Jan 22, 2006 Issued
Array ( [id] => 631894 [patent_doc_number] => 07133318 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-11-07 [patent_title] => 'Output driver capable of controlling slew rate of output signal according to operating frequency information or CAS latency information' [patent_app_type] => utility [patent_app_number] => 11/339120 [patent_app_country] => US [patent_app_date] => 2006-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2757 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/133/07133318.pdf [firstpage_image] =>[orig_patent_app_number] => 11339120 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/339120
Output driver capable of controlling slew rate of output signal according to operating frequency information or CAS latency information Jan 22, 2006 Issued
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