Hoai V. Ho

Array ( [id] => 5055496 [patent_doc_number] => 20070058417 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-15 [patent_title] => 'Method for writing data into a memory cell of a conductive bridging random access memory, memory circuit and CBRAM memory circuit' [patent_app_type] => utility [patent_app_number] => 11/222282 [patent_app_country] => US [patent_app_date] => 2005-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5341 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0058/20070058417.pdf [firstpage_image] =>[orig_patent_app_number] => 11222282 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 441292 [patent_doc_number] => 07259978 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-21 [patent_title] => 'Semiconductor memory devices and signal line arrangements and related methods' [patent_app_type] => utility [patent_app_number] => 11/221684 [patent_app_country] => US [patent_app_date] => 2005-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11567 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/259/07259978.pdf [firstpage_image] =>[orig_patent_app_number] => 11221684 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 402838 [patent_doc_number] => 07292478 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-06 [patent_title] => 'Non-volatile memory including charge-trapping layer, and operation and fabrication of the same' [patent_app_type] => utility [patent_app_number] => 11/222708 [patent_app_country] => US [patent_app_date] => 2005-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 2535 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/292/07292478.pdf [firstpage_image] =>[orig_patent_app_number] => 11222708 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5709219 [patent_doc_number] => 20060050564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-09 [patent_title] => 'Non-volatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/219756 [patent_app_country] => US [patent_app_date] => 2005-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7518 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20060050564.pdf [firstpage_image] =>[orig_patent_app_number] => 11219756 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 486878 [patent_doc_number] => 07221585 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-22 [patent_title] => 'Choosing read/write current polarities to reduce errors in a magnetic memory' [patent_app_type] => utility [patent_app_number] => 11/220132 [patent_app_country] => US [patent_app_date] => 2005-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 8019 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/221/07221585.pdf [firstpage_image] =>[orig_patent_app_number] => 11220132 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5825404 [patent_doc_number] => 20060062075 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-23 [patent_title] => 'Magnetic memory' [patent_app_type] => utility [patent_app_number] => 11/218662 [patent_app_country] => US [patent_app_date] => 2005-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 10647 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20060062075.pdf [firstpage_image] =>[orig_patent_app_number] => 11218662 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7765484 [patent_doc_number] => 08116142 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-14 [patent_title] => 'Method and circuit for erasing a non-volatile memory cell' [patent_app_type] => utility [patent_app_number] => 11/220872 [patent_app_country] => US [patent_app_date] => 2005-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5567 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/116/08116142.pdf [firstpage_image] =>[orig_patent_app_number] => 11220872 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5709203 [patent_doc_number] => 20060050548 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-09 [patent_title] => 'Semiconductor memory device capable of compensating for leakage current' [patent_app_type] => utility [patent_app_number] => 11/220294 [patent_app_country] => US [patent_app_date] => 2005-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3912 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20060050548.pdf [firstpage_image] =>[orig_patent_app_number] => 11220294 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 463474 [patent_doc_number] => 07242613 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-10 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/218598 [patent_app_country] => US [patent_app_date] => 2005-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 57 [patent_figures_cnt] => 98 [patent_no_of_words] => 18441 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/242/07242613.pdf [firstpage_image] =>[orig_patent_app_number] => 11218598 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5641527 [patent_doc_number] => 20060279982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-14 [patent_title] => 'Magnetic random access memory' [patent_app_type] => utility [patent_app_number] => 11/217296 [patent_app_country] => US [patent_app_date] => 2005-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6878 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0279/20060279982.pdf [firstpage_image] =>[orig_patent_app_number] => 11217296 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5725465 [patent_doc_number] => 20060056225 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-16 [patent_title] => 'Ferroelectric memory device' [patent_app_type] => utility [patent_app_number] => 11/216078 [patent_app_country] => US [patent_app_date] => 2005-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 22554 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20060056225.pdf [firstpage_image] =>[orig_patent_app_number] => 11216078 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5147258 [patent_doc_number] => 20070047312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-01 [patent_title] => 'Operation of multiple select gate architecture' [patent_app_type] => utility [patent_app_number] => 11/218848 [patent_app_country] => US [patent_app_date] => 2005-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4633 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20070047312.pdf [firstpage_image] =>[orig_patent_app_number] => 11218848 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5147322 [patent_doc_number] => 20070047376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-01 [patent_title] => 'METHOD AND APPARATUS FOR SYNCHRONIZING DATA FROM MEMORY ARRAYS' [patent_app_type] => utility [patent_app_number] => 11/218194 [patent_app_country] => US [patent_app_date] => 2005-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3889 [patent_no_of_claims] => 55 [patent_no_of_ind_claims] => 18 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20070047376.pdf [firstpage_image] =>[orig_patent_app_number] => 11218194 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 426238 [patent_doc_number] => 07272034 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-09-18 [patent_title] => 'Current driven switching of magnetic storage cells utilizing spin transfer and magnetic memories using such cells' [patent_app_type] => utility [patent_app_number] => 11/217258 [patent_app_country] => US [patent_app_date] => 2005-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 11900 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/272/07272034.pdf [firstpage_image] =>[orig_patent_app_number] => 11217258 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7602638 [patent_doc_number] => 07236398 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-06-26 [patent_title] => 'Structure of a split-gate memory cell' [patent_app_type] => utility [patent_app_number] => 11/218214 [patent_app_country] => US [patent_app_date] => 2005-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4838 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/236/07236398.pdf [firstpage_image] =>[orig_patent_app_number] => 11218214 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 426246 [patent_doc_number] => 07272035 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-09-18 [patent_title] => 'Current driven switching of magnetic storage cells utilizing spin transfer and magnetic memories using such cells' [patent_app_type] => utility [patent_app_number] => 11/217524 [patent_app_country] => US [patent_app_date] => 2005-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 11903 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/272/07272035.pdf [firstpage_image] =>[orig_patent_app_number] => 11217524 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 463482 [patent_doc_number] => 07242618 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-10 [patent_title] => 'Method for reading non-volatile memory cells' [patent_app_type] => utility [patent_app_number] => 11/205411 [patent_app_country] => US [patent_app_date] => 2005-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 5778 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/242/07242618.pdf [firstpage_image] =>[orig_patent_app_number] => 11205411 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 451304 [patent_doc_number] => 07251154 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-31 [patent_title] => 'Method and apparatus providing a cross-point memory array using a variable resistance memory cell and capacitance' [patent_app_type] => utility [patent_app_number] => 11/203142 [patent_app_country] => US [patent_app_date] => 2005-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2907 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/251/07251154.pdf [firstpage_image] =>[orig_patent_app_number] => 11203142 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7237538 [patent_doc_number] => 20050270878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-08 [patent_title] => 'Nonvolatile semiconductor memory and method of operating the same' [patent_app_type] => utility [patent_app_number] => 11/199263 [patent_app_country] => US [patent_app_date] => 2005-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 14066 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0270/20050270878.pdf [firstpage_image] =>[orig_patent_app_number] => 11199263 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7054923 [patent_doc_number] => 20050276095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-15 [patent_title] => 'Asynchronous static random access memory' [patent_app_type] => utility [patent_app_number] => 11/200722 [patent_app_country] => US [patent_app_date] => 2005-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 8468 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0276/20050276095.pdf [firstpage_image] =>[orig_patent_app_number] => 11200722 [rel_patent_id] =>[rel_patent_doc_number] =>)