Search

Hoai V. Ho

Examiner (ID: 15701)

Most Active Art Unit
2827
Art Unit(s)
2818, 2827, 2312, 2511
Total Applications
2584
Issued Applications
2371
Pending Applications
99
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 405519 [patent_doc_number] => 07289354 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-30 [patent_title] => 'Memory array with a delayed wordline boost' [patent_app_type] => utility [patent_app_number] => 11/191349 [patent_app_country] => US [patent_app_date] => 2005-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 7603 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/289/07289354.pdf [firstpage_image] =>[orig_patent_app_number] => 11191349 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/191349
Memory array with a delayed wordline boost Jul 27, 2005 Issued
Array ( [id] => 5893678 [patent_doc_number] => 20060002216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-05 [patent_title] => 'Thin film magnetic memory device and semiconductor integrated circuit device including the same as one of circuit blocks' [patent_app_type] => utility [patent_app_number] => 11/188089 [patent_app_country] => US [patent_app_date] => 2005-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 18493 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20060002216.pdf [firstpage_image] =>[orig_patent_app_number] => 11188089 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/188089
Thin film magnetic memory device and semiconductor integrated circuit device including the same as one of circuit blocks Jul 24, 2005 Issued
Array ( [id] => 463481 [patent_doc_number] => 07242617 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-10 [patent_title] => 'Method of dynamically adjusting operation of a memory chip and apparatus of measuring thickness of an ONO layer of the memory chip' [patent_app_type] => utility [patent_app_number] => 11/188202 [patent_app_country] => US [patent_app_date] => 2005-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3725 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/242/07242617.pdf [firstpage_image] =>[orig_patent_app_number] => 11188202 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/188202
Method of dynamically adjusting operation of a memory chip and apparatus of measuring thickness of an ONO layer of the memory chip Jul 21, 2005 Issued
Array ( [id] => 7044422 [patent_doc_number] => 20050249017 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-10 [patent_title] => 'Semiconductor device having a power down mode' [patent_app_type] => utility [patent_app_number] => 11/183802 [patent_app_country] => US [patent_app_date] => 2005-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 9777 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0249/20050249017.pdf [firstpage_image] =>[orig_patent_app_number] => 11183802 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/183802
Semiconductor device having a power down mode Jul 18, 2005 Issued
Array ( [id] => 455612 [patent_doc_number] => 07248526 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-24 [patent_title] => 'Refresh period generating circuit' [patent_app_type] => utility [patent_app_number] => 11/180552 [patent_app_country] => US [patent_app_date] => 2005-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7954 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/248/07248526.pdf [firstpage_image] =>[orig_patent_app_number] => 11180552 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/180552
Refresh period generating circuit Jul 13, 2005 Issued
Array ( [id] => 525920 [patent_doc_number] => 07193888 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-20 [patent_title] => 'Nonvolatile memory circuit based on change in MIS transistor characteristics' [patent_app_type] => utility [patent_app_number] => 11/180132 [patent_app_country] => US [patent_app_date] => 2005-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 6030 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/193/07193888.pdf [firstpage_image] =>[orig_patent_app_number] => 11180132 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/180132
Nonvolatile memory circuit based on change in MIS transistor characteristics Jul 12, 2005 Issued
Array ( [id] => 503407 [patent_doc_number] => 07209399 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-24 [patent_title] => 'Circuit and method of driving bitlines of integrated circuit memory using improved precharge scheme and sense-amplification scheme' [patent_app_type] => utility [patent_app_number] => 11/180832 [patent_app_country] => US [patent_app_date] => 2005-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7913 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/209/07209399.pdf [firstpage_image] =>[orig_patent_app_number] => 11180832 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/180832
Circuit and method of driving bitlines of integrated circuit memory using improved precharge scheme and sense-amplification scheme Jul 12, 2005 Issued
Array ( [id] => 5074179 [patent_doc_number] => 20070014154 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-18 [patent_title] => 'FLAT-CELL READ-ONLY MEMORY' [patent_app_type] => utility [patent_app_number] => 11/179570 [patent_app_country] => US [patent_app_date] => 2005-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1379 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20070014154.pdf [firstpage_image] =>[orig_patent_app_number] => 11179570 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/179570
Flat-cell read-only memory Jul 12, 2005 Issued
Array ( [id] => 614120 [patent_doc_number] => 07149104 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-12-12 [patent_title] => 'Storage and recovery of data based on change in MIS transistor characteristics' [patent_app_type] => utility [patent_app_number] => 11/180125 [patent_app_country] => US [patent_app_date] => 2005-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6149 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/149/07149104.pdf [firstpage_image] =>[orig_patent_app_number] => 11180125 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/180125
Storage and recovery of data based on change in MIS transistor characteristics Jul 12, 2005 Issued
Array ( [id] => 409893 [patent_doc_number] => 07286394 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-23 [patent_title] => 'Non-volatile semiconductor memory device allowing concurrent data writing and data reading' [patent_app_type] => utility [patent_app_number] => 11/179892 [patent_app_country] => US [patent_app_date] => 2005-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 31 [patent_no_of_words] => 23102 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/286/07286394.pdf [firstpage_image] =>[orig_patent_app_number] => 11179892 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/179892
Non-volatile semiconductor memory device allowing concurrent data writing and data reading Jul 12, 2005 Issued
Array ( [id] => 5792370 [patent_doc_number] => 20060013051 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-19 [patent_title] => 'Local sense amplifier in memory device' [patent_app_type] => utility [patent_app_number] => 11/179408 [patent_app_country] => US [patent_app_date] => 2005-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6200 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20060013051.pdf [firstpage_image] =>[orig_patent_app_number] => 11179408 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/179408
Local sense amplifier in memory device Jul 11, 2005 Issued
Array ( [id] => 416648 [patent_doc_number] => 07280397 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-09 [patent_title] => 'Three-dimensional non-volatile SRAM incorporating thin-film device layer' [patent_app_type] => utility [patent_app_number] => 11/179360 [patent_app_country] => US [patent_app_date] => 2005-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 9180 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/280/07280397.pdf [firstpage_image] =>[orig_patent_app_number] => 11179360 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/179360
Three-dimensional non-volatile SRAM incorporating thin-film device layer Jul 10, 2005 Issued
Array ( [id] => 7017880 [patent_doc_number] => 20050219898 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-06 [patent_title] => 'Dedicated redundancy circuits for different operations in a flash memory device' [patent_app_type] => utility [patent_app_number] => 11/138715 [patent_app_country] => US [patent_app_date] => 2005-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5150 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0219/20050219898.pdf [firstpage_image] =>[orig_patent_app_number] => 11138715 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/138715
Dedicated redundancy circuits for different operations in a flash memory device May 25, 2005 Issued
Array ( [id] => 463496 [patent_doc_number] => 07242626 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-10 [patent_title] => 'Method and apparatus for low voltage write in a static random access memory' [patent_app_type] => utility [patent_app_number] => 11/123484 [patent_app_country] => US [patent_app_date] => 2005-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2762 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/242/07242626.pdf [firstpage_image] =>[orig_patent_app_number] => 11123484 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/123484
Method and apparatus for low voltage write in a static random access memory May 5, 2005 Issued
Array ( [id] => 5833457 [patent_doc_number] => 20060245287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-02 [patent_title] => 'Methods and apparatus for implementing standby mode in a random access memory' [patent_app_type] => utility [patent_app_number] => 11/116456 [patent_app_country] => US [patent_app_date] => 2005-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6349 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0245/20060245287.pdf [firstpage_image] =>[orig_patent_app_number] => 11116456 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/116456
Methods and apparatus for implementing standby mode in a random access memory Apr 27, 2005 Issued
Array ( [id] => 437132 [patent_doc_number] => 07263002 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-28 [patent_title] => 'Nonvolatile semiconductor memory device that achieves speedup in read operation' [patent_app_type] => utility [patent_app_number] => 11/115298 [patent_app_country] => US [patent_app_date] => 2005-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7610 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/263/07263002.pdf [firstpage_image] =>[orig_patent_app_number] => 11115298 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/115298
Nonvolatile semiconductor memory device that achieves speedup in read operation Apr 26, 2005 Issued
Array ( [id] => 7068215 [patent_doc_number] => 20050243598 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-03 [patent_title] => 'MRAM arrays and methods for writing and reading magnetic memory devices' [patent_app_type] => utility [patent_app_number] => 11/115422 [patent_app_country] => US [patent_app_date] => 2005-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 17634 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0243/20050243598.pdf [firstpage_image] =>[orig_patent_app_number] => 11115422 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/115422
MRAM arrays and methods for writing and reading magnetic memory devices Apr 26, 2005 Issued
Array ( [id] => 494635 [patent_doc_number] => 07215588 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-08 [patent_title] => 'Apparatus for controlling self-refresh period in memory device' [patent_app_type] => utility [patent_app_number] => 11/115444 [patent_app_country] => US [patent_app_date] => 2005-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 6016 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/215/07215588.pdf [firstpage_image] =>[orig_patent_app_number] => 11115444 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/115444
Apparatus for controlling self-refresh period in memory device Apr 26, 2005 Issued
Array ( [id] => 6924570 [patent_doc_number] => 20050237825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-27 [patent_title] => 'Data processing apparatus' [patent_app_type] => utility [patent_app_number] => 11/115132 [patent_app_country] => US [patent_app_date] => 2005-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7122 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20050237825.pdf [firstpage_image] =>[orig_patent_app_number] => 11115132 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/115132
Nonvolatile memory with multi-frequency charge pump control Apr 26, 2005 Issued
Array ( [id] => 380700 [patent_doc_number] => 07310277 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-18 [patent_title] => 'Non-volatile semiconductor storage device with specific command enable/disable control signal' [patent_app_type] => utility [patent_app_number] => 11/113046 [patent_app_country] => US [patent_app_date] => 2005-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3225 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/310/07310277.pdf [firstpage_image] =>[orig_patent_app_number] => 11113046 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/113046
Non-volatile semiconductor storage device with specific command enable/disable control signal Apr 24, 2005 Issued
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