Hoai V. Ho

Array ( [id] => 1026552 [patent_doc_number] => 06885571 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-26 [patent_title] => 'Associative memory having a search bus driving circuit for supplying search data to associative memory cells' [patent_app_type] => utility [patent_app_number] => 10/615910 [patent_app_country] => US [patent_app_date] => 2003-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5869 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/885/06885571.pdf [firstpage_image] =>[orig_patent_app_number] => 10615910 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7279755 [patent_doc_number] => 20040062132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-01 [patent_title] => 'Line selector for a matrix of memory elements' [patent_app_type] => new [patent_app_number] => 10/616414 [patent_app_country] => US [patent_app_date] => 2003-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6180 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20040062132.pdf [firstpage_image] =>[orig_patent_app_number] => 10616414 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 977345 [patent_doc_number] => 06934211 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-23 [patent_title] => 'DRAM with refresh control function' [patent_app_type] => utility [patent_app_number] => 10/602117 [patent_app_country] => US [patent_app_date] => 2003-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 23 [patent_no_of_words] => 4063 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/934/06934211.pdf [firstpage_image] =>[orig_patent_app_number] => 10602117 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7243954 [patent_doc_number] => 20040257854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-23 [patent_title] => 'Multi-level memory device and methods for programming and reading the same' [patent_app_type] => new [patent_app_number] => 10/465012 [patent_app_country] => US [patent_app_date] => 2003-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2252 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0257/20040257854.pdf [firstpage_image] =>[orig_patent_app_number] => 10465012 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 947196 [patent_doc_number] => 06965531 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-15 [patent_title] => 'Semiconductor memory device having a reference cell' [patent_app_type] => utility [patent_app_number] => 10/462410 [patent_app_country] => US [patent_app_date] => 2003-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5311 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/965/06965531.pdf [firstpage_image] =>[orig_patent_app_number] => 10462410 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7342528 [patent_doc_number] => 20040246784 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-09 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => new [patent_app_number] => 10/455310 [patent_app_country] => US [patent_app_date] => 2003-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6041 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20040246784.pdf [firstpage_image] =>[orig_patent_app_number] => 10455310 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1091198 [patent_doc_number] => 06829165 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-07 [patent_title] => 'Non-volatile semiconductor memory device and method of actuating the same' [patent_app_type] => B2 [patent_app_number] => 10/448112 [patent_app_country] => US [patent_app_date] => 2003-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 18371 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 614 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/829/06829165.pdf [firstpage_image] =>[orig_patent_app_number] => 10448112 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6824448 [patent_doc_number] => 20030235070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-25 [patent_title] => 'Thin film magnetic memory device and semiconductor integrated circuit device including the same as one of circuit blocks' [patent_app_type] => new [patent_app_number] => 10/441016 [patent_app_country] => US [patent_app_date] => 2003-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 18763 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20030235070.pdf [firstpage_image] =>[orig_patent_app_number] => 10441016 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1191090 [patent_doc_number] => 06735104 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-11 [patent_title] => 'Memory device with row and column decoder circuits arranged in a checkerboard pattern under a plurality of memory arrays' [patent_app_type] => B2 [patent_app_number] => 10/440377 [patent_app_country] => US [patent_app_date] => 2003-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 4589 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/735/06735104.pdf [firstpage_image] =>[orig_patent_app_number] => 10440377 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7130230 [patent_doc_number] => 20040041259 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-04 [patent_title] => 'Double capacity stacked memory and fabrication method thereof' [patent_app_type] => new [patent_app_number] => 10/424416 [patent_app_country] => US [patent_app_date] => 2003-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2274 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0041/20040041259.pdf [firstpage_image] =>[orig_patent_app_number] => 10424416 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6828576 [patent_doc_number] => 20030179634 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-25 [patent_title] => 'Shadow RAM cell using a ferroelectric capacitor' [patent_app_type] => new [patent_app_number] => 10/420658 [patent_app_country] => US [patent_app_date] => 2003-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7528 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20030179634.pdf [firstpage_image] =>[orig_patent_app_number] => 10420658 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1010422 [patent_doc_number] => 06901011 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-31 [patent_title] => 'Self-repair method via ECC for nonvolatile memory devices, and relative nonvolatile memory device' [patent_app_type] => utility [patent_app_number] => 10/417416 [patent_app_country] => US [patent_app_date] => 2003-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4367 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/901/06901011.pdf [firstpage_image] =>[orig_patent_app_number] => 10417416 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7418959 [patent_doc_number] => 20040208065 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-21 [patent_title] => 'Row redundancy memory repair scheme with shift ot eliminate timing penalty' [patent_app_type] => new [patent_app_number] => 10/414516 [patent_app_country] => US [patent_app_date] => 2003-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3075 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0208/20040208065.pdf [firstpage_image] =>[orig_patent_app_number] => 10414516 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 672865 [patent_doc_number] => RE039227 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2006-08-08 [patent_title] => 'Content addressable memory (CAM) arrays and cells having low power requirements' [patent_app_type] => reissue [patent_app_number] => 10/403581 [patent_app_country] => US [patent_app_date] => 2003-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 9071 [patent_no_of_claims] => 68 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/039/RE039227.pdf [firstpage_image] =>[orig_patent_app_number] => 10403581 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7268762 [patent_doc_number] => 20040057280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-25 [patent_title] => 'Current drive circuit avoiding effect of voltage drop caused by load and semiconductor memory device equipped therewith' [patent_app_type] => new [patent_app_number] => 10/396414 [patent_app_country] => US [patent_app_date] => 2003-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 18349 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20040057280.pdf [firstpage_image] =>[orig_patent_app_number] => 10396414 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6828570 [patent_doc_number] => 20030179628 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-25 [patent_title] => 'Semiconductor memory' [patent_app_type] => new [patent_app_number] => 10/392912 [patent_app_country] => US [patent_app_date] => 2003-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5204 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20030179628.pdf [firstpage_image] =>[orig_patent_app_number] => 10392912 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6828572 [patent_doc_number] => 20030179630 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-25 [patent_title] => 'Non-volatile static random access memory' [patent_app_type] => new [patent_app_number] => 10/394415 [patent_app_country] => US [patent_app_date] => 2003-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7418 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 488 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20030179630.pdf [firstpage_image] =>[orig_patent_app_number] => 10394415 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 942238 [patent_doc_number] => 06970386 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-29 [patent_title] => 'Method and apparatus for detecting exposure of a semiconductor circuit to ultra-violet light' [patent_app_type] => utility [patent_app_number] => 10/378414 [patent_app_country] => US [patent_app_date] => 2003-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3659 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/970/06970386.pdf [firstpage_image] =>[orig_patent_app_number] => 10378414 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1023648 [patent_doc_number] => 06888756 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-03 [patent_title] => 'Low-voltage non-volatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/376615 [patent_app_country] => US [patent_app_date] => 2003-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4897 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/888/06888756.pdf [firstpage_image] =>[orig_patent_app_number] => 10376615 [rel_patent_id] =>[rel_patent_doc_number] =>)