Search

Hoai V. Ho

Examiner (ID: 15701)

Most Active Art Unit
2827
Art Unit(s)
2818, 2827, 2312, 2511
Total Applications
2584
Issued Applications
2371
Pending Applications
99
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6272661 [patent_doc_number] => 20020105830 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-08 [patent_title] => 'Double-bit non-voltatile memory unit and corresponding data read/write method' [patent_app_type] => new [patent_app_number] => 10/075015 [patent_app_country] => US [patent_app_date] => 2002-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3662 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20020105830.pdf [firstpage_image] =>[orig_patent_app_number] => 10075015 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/075015
Double-bit non-volatile memory unit and corresponding data read/write method Feb 12, 2002 Issued
Array ( [id] => 1319658 [patent_doc_number] => 06611446 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-08-26 [patent_title] => 'Semiconductor memory with multistage local sense amplifier' [patent_app_type] => B2 [patent_app_number] => 10/068407 [patent_app_country] => US [patent_app_date] => 2002-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4034 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/611/06611446.pdf [firstpage_image] =>[orig_patent_app_number] => 10068407 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/068407
Semiconductor memory with multistage local sense amplifier Feb 4, 2002 Issued
Array ( [id] => 6155678 [patent_doc_number] => 20020145914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-10 [patent_title] => 'Process for making and programming and operating a dual-bit multi-level ballistic flash memory' [patent_app_type] => new [patent_app_number] => 10/058461 [patent_app_country] => US [patent_app_date] => 2002-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7311 [patent_no_of_claims] => 81 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20020145914.pdf [firstpage_image] =>[orig_patent_app_number] => 10058461 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/058461
Process for making and programming and operating a dual-bit multi-level ballistic flash memory Jan 27, 2002 Issued
Array ( [id] => 6155679 [patent_doc_number] => 20020145915 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-10 [patent_title] => 'Process for making and programming and operating a dual-bit multi-level ballistic flash memory' [patent_app_type] => new [patent_app_number] => 10/058484 [patent_app_country] => US [patent_app_date] => 2002-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7303 [patent_no_of_claims] => 81 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20020145915.pdf [firstpage_image] =>[orig_patent_app_number] => 10058484 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/058484
Process for making and programming and operating a dual-bit multi-level ballistic flash memory Jan 27, 2002 Issued
Array ( [id] => 5784774 [patent_doc_number] => 20020159298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-31 [patent_title] => 'Nonvolatile semiconductor memory device capable of preventing occurrence of latchup' [patent_app_type] => new [patent_app_number] => 10/052519 [patent_app_country] => US [patent_app_date] => 2002-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6044 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20020159298.pdf [firstpage_image] =>[orig_patent_app_number] => 10052519 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/052519
Nonvolatile semiconductor memory device capable of preventing occurrence of latch-up Jan 22, 2002 Issued
Array ( [id] => 5900937 [patent_doc_number] => 20020139999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-03 [patent_title] => 'Nonvolatile semiconductor memory device and method of erasing the same' [patent_app_type] => new [patent_app_number] => 10/051313 [patent_app_country] => US [patent_app_date] => 2002-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 9163 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0139/20020139999.pdf [firstpage_image] =>[orig_patent_app_number] => 10051313 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/051313
Nonvolatile semiconductor memory device and method of erasing the same Jan 21, 2002 Issued
Array ( [id] => 7633727 [patent_doc_number] => 06657893 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-02 [patent_title] => 'Nonvolatile semiconductor memory device and method for driving the same' [patent_app_type] => B2 [patent_app_number] => 10/050965 [patent_app_country] => US [patent_app_date] => 2002-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 48 [patent_no_of_words] => 22096 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/657/06657893.pdf [firstpage_image] =>[orig_patent_app_number] => 10050965 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/050965
Nonvolatile semiconductor memory device and method for driving the same Jan 21, 2002 Issued
Array ( [id] => 1227337 [patent_doc_number] => 06700831 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-02 [patent_title] => 'Integrated memory having a plurality of memory cell arrays and method for operating the integrated memory' [patent_app_type] => B2 [patent_app_number] => 10/054613 [patent_app_country] => US [patent_app_date] => 2002-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2933 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/700/06700831.pdf [firstpage_image] =>[orig_patent_app_number] => 10054613 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/054613
Integrated memory having a plurality of memory cell arrays and method for operating the integrated memory Jan 21, 2002 Issued
Array ( [id] => 6353278 [patent_doc_number] => 20020057602 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-16 [patent_title] => 'Circuit configuration for enhancing performance characteristics of fabricated devices' [patent_app_type] => new [patent_app_number] => 10/047619 [patent_app_country] => US [patent_app_date] => 2002-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3760 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20020057602.pdf [firstpage_image] =>[orig_patent_app_number] => 10047619 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/047619
Circuit configuration for enhancing performance characteristics of fabricated devices Jan 15, 2002 Issued
Array ( [id] => 1303722 [patent_doc_number] => 06628556 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-30 [patent_title] => 'Circuit configuration for controlling signal propagation in fabricated devices' [patent_app_type] => B2 [patent_app_number] => 10/047808 [patent_app_country] => US [patent_app_date] => 2002-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 3732 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/628/06628556.pdf [firstpage_image] =>[orig_patent_app_number] => 10047808 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/047808
Circuit configuration for controlling signal propagation in fabricated devices Jan 15, 2002 Issued
Array ( [id] => 1416870 [patent_doc_number] => 06538933 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-03-25 [patent_title] => 'High speed semiconductor memory device with short word line switching time' [patent_app_type] => B2 [patent_app_number] => 10/034076 [patent_app_country] => US [patent_app_date] => 2002-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 12983 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/538/06538933.pdf [firstpage_image] =>[orig_patent_app_number] => 10034076 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/034076
High speed semiconductor memory device with short word line switching time Jan 2, 2002 Issued
Array ( [id] => 6155660 [patent_doc_number] => 20020145900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-10 [patent_title] => 'Low power memory module using restricted RAM activation' [patent_app_type] => new [patent_app_number] => 10/035728 [patent_app_country] => US [patent_app_date] => 2001-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2822 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20020145900.pdf [firstpage_image] =>[orig_patent_app_number] => 10035728 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/035728
Low power memory module using restricted RAM activation Dec 19, 2001 Issued
Array ( [id] => 5919845 [patent_doc_number] => 20020114196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-22 [patent_title] => 'Circuit configuration for reading memory elements' [patent_app_type] => new [patent_app_number] => 10/015718 [patent_app_country] => US [patent_app_date] => 2001-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1905 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0114/20020114196.pdf [firstpage_image] =>[orig_patent_app_number] => 10015718 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/015718
Circuit configuration for reading memory elements Dec 12, 2001 Issued
Array ( [id] => 6239871 [patent_doc_number] => 20020044485 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-18 [patent_title] => 'Semiconductor, memory card, and data processing system' [patent_app_type] => new [patent_app_number] => 10/011723 [patent_app_country] => US [patent_app_date] => 2001-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 58 [patent_figures_cnt] => 58 [patent_no_of_words] => 19816 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20020044485.pdf [firstpage_image] =>[orig_patent_app_number] => 10011723 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/011723
Nonvolatile memory system Dec 10, 2001 Issued
Array ( [id] => 6061935 [patent_doc_number] => 20020031007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-14 [patent_title] => 'Semiconductor memory apparatus, semiconductor apparatus, data processing apparatus and computer system' [patent_app_type] => new [patent_app_number] => 09/988197 [patent_app_country] => US [patent_app_date] => 2001-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11380 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20020031007.pdf [firstpage_image] =>[orig_patent_app_number] => 09988197 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/988197
Semiconductor memory apparatus, semiconductor apparatus, data processing apparatus and computer system Nov 18, 2001 Issued
Array ( [id] => 1372512 [patent_doc_number] => 06574154 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-06-03 [patent_title] => 'Data transmitter' [patent_app_type] => B2 [patent_app_number] => 09/988152 [patent_app_country] => US [patent_app_date] => 2001-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 32 [patent_no_of_words] => 11829 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/574/06574154.pdf [firstpage_image] =>[orig_patent_app_number] => 09988152 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/988152
Data transmitter Nov 18, 2001 Issued
Array ( [id] => 6094322 [patent_doc_number] => 20020051382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-02 [patent_title] => 'Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein' [patent_app_type] => new [patent_app_number] => 09/987957 [patent_app_country] => US [patent_app_date] => 2001-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 65 [patent_figures_cnt] => 65 [patent_no_of_words] => 32165 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20020051382.pdf [firstpage_image] =>[orig_patent_app_number] => 09987957 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/987957
Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein Nov 15, 2001 Issued
Array ( [id] => 5872736 [patent_doc_number] => 20020048189 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-25 [patent_title] => 'Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein' [patent_app_type] => new [patent_app_number] => 09/987958 [patent_app_country] => US [patent_app_date] => 2001-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 65 [patent_figures_cnt] => 65 [patent_no_of_words] => 32131 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0048/20020048189.pdf [firstpage_image] =>[orig_patent_app_number] => 09987958 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/987958
Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein Nov 15, 2001 Issued
Array ( [id] => 7630495 [patent_doc_number] => 06636441 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-10-21 [patent_title] => 'Semiconductor memory device including non-volatile memory cell array having MOS structure in well region formed on semiconductor substrate' [patent_app_type] => B2 [patent_app_number] => 09/987611 [patent_app_country] => US [patent_app_date] => 2001-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6769 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/636/06636441.pdf [firstpage_image] =>[orig_patent_app_number] => 09987611 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/987611
Semiconductor memory device including non-volatile memory cell array having MOS structure in well region formed on semiconductor substrate Nov 14, 2001 Issued
Array ( [id] => 1288145 [patent_doc_number] => 06643166 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-04 [patent_title] => 'Low power SRAM redundancy repair scheme' [patent_app_type] => B1 [patent_app_number] => 09/992518 [patent_app_country] => US [patent_app_date] => 2001-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 1941 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/643/06643166.pdf [firstpage_image] =>[orig_patent_app_number] => 09992518 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/992518
Low power SRAM redundancy repair scheme Nov 13, 2001 Issued
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