
Hoai V. Pham
Examiner (ID: 18096)
| Most Active Art Unit | 2892 |
| Art Unit(s) | 2814, 2892, 2811 |
| Total Applications | 2250 |
| Issued Applications | 2043 |
| Pending Applications | 85 |
| Abandoned Applications | 160 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
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[patent_issue_date] => 2024-07-09
[patent_title] => Semiconductor structure having a groove located in the semiconductor substrate and connected to the heat transfer layer
[patent_app_type] => utility
[patent_app_number] => 17/487869
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Array
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[patent_issue_date] => 2023-05-30
[patent_title] => Semiconductor structure having a landing area extends from first portion to second portion of an active area across a bit-line
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Array
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[patent_issue_date] => 2025-02-11
[patent_title] => Method of manufacturing a via and a metal wiring for a semiconductor device
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Array
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[patent_title] => METHOD OF FABRICATING SEMICONDUCTOR DEVICE
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Array
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[patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME
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Array
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[patent_issue_date] => 2025-10-21
[patent_title] => Method of forming a bit line structure
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Array
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Array
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[patent_title] => Bit line structure including ohmic contact and forming method thereof
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Array
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[patent_title] => Dielectric protection layer in middle-of-line interconnect structure manufacturing method
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Array
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[patent_title] => Method of forming resistive memory cell having an ovonic threshold switch
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Array
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[patent_title] => Three-dimensional semiconductor memory devices having a source structure that overlaps a buried insulating layer
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Array
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Array
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Array
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Array
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Array
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