
Hoai V. Pham
Examiner (ID: 18096)
| Most Active Art Unit | 2892 |
| Art Unit(s) | 2814, 2892, 2811 |
| Total Applications | 2250 |
| Issued Applications | 2043 |
| Pending Applications | 85 |
| Abandoned Applications | 160 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19073469
[patent_doc_number] => 20240107895
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-28
[patent_title] => MAGNETORESISTIVE RANDOM ACCESS MEMORY HAVING A RING OF MAGNETIC TUNNELING JUNCTION REGION SURROUNDING AN ARRAY REGION
[patent_app_type] => utility
[patent_app_number] => 18/528707
[patent_app_country] => US
[patent_app_date] => 2023-12-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3247
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18528707
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/528707 | Magnetoresistive random access memory having a ring of magnetic tunneling junction region surrounding an array region | Dec 3, 2023 | Issued |
Array
(
[id] => 19057017
[patent_doc_number] => 20240098986
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-21
[patent_title] => METHOD OF FORMING CONTACT INCLUDED IN SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/524794
[patent_app_country] => US
[patent_app_date] => 2023-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6023
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18524794
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/524794 | Method of forming contact included in semiconductor device | Nov 29, 2023 | Issued |
Array
(
[id] => 19721898
[patent_doc_number] => 12207456
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-21
[patent_title] => Method of forming an integrated circuit devices having buried word lines
[patent_app_type] => utility
[patent_app_number] => 18/525187
[patent_app_country] => US
[patent_app_date] => 2023-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 31
[patent_figures_cnt] => 31
[patent_no_of_words] => 8091
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18525187
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/525187 | Method of forming an integrated circuit devices having buried word lines | Nov 29, 2023 | Issued |
Array
(
[id] => 19928300
[patent_doc_number] => 12302611
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-05-13
[patent_title] => FinFET structure with a composite stress layer and reduced fin buckling
[patent_app_type] => utility
[patent_app_number] => 18/521584
[patent_app_country] => US
[patent_app_date] => 2023-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 2374
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18521584
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/521584 | FinFET structure with a composite stress layer and reduced fin buckling | Nov 27, 2023 | Issued |
Array
(
[id] => 20268790
[patent_doc_number] => 12439807
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-10-07
[patent_title] => Light emitting display panel including plurality of organic and inorganic layers and method of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 18/515181
[patent_app_country] => US
[patent_app_date] => 2023-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 12
[patent_no_of_words] => 3571
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18515181
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/515181 | Light emitting display panel including plurality of organic and inorganic layers and method of manufacturing the same | Nov 19, 2023 | Issued |
Array
(
[id] => 20268790
[patent_doc_number] => 12439807
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-10-07
[patent_title] => Light emitting display panel including plurality of organic and inorganic layers and method of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 18/515181
[patent_app_country] => US
[patent_app_date] => 2023-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 12
[patent_no_of_words] => 3571
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18515181
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/515181 | Light emitting display panel including plurality of organic and inorganic layers and method of manufacturing the same | Nov 19, 2023 | Issued |
Array
(
[id] => 19928377
[patent_doc_number] => 12302689
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-05-13
[patent_title] => Organic light-emitting component having a light-emitting layer as part of a charge generation layer
[patent_app_type] => utility
[patent_app_number] => 18/504567
[patent_app_country] => US
[patent_app_date] => 2023-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 0
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18504567
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/504567 | Organic light-emitting component having a light-emitting layer as part of a charge generation layer | Nov 7, 2023 | Issued |
Array
(
[id] => 18991230
[patent_doc_number] => 20240063199
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-22
[patent_title] => DIRECT-BONDED OPTOELECTRONIC DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/498718
[patent_app_country] => US
[patent_app_date] => 2023-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3780
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18498718
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/498718 | Method of direct-bonded optoelectronic devices | Oct 30, 2023 | Issued |
Array
(
[id] => 18975207
[patent_doc_number] => 20240055299
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-15
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/383086
[patent_app_country] => US
[patent_app_date] => 2023-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 55145
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18383086
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/383086 | Semiconductor device having plurality of insulators | Oct 23, 2023 | Issued |
Array
(
[id] => 19252908
[patent_doc_number] => 20240203905
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-20
[patent_title] => ELIMINATING SUBSTRATE METAL CRACKS IN A BALL GRID ARRAY PACKAGE
[patent_app_type] => utility
[patent_app_number] => 18/479144
[patent_app_country] => US
[patent_app_date] => 2023-10-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2668
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18479144
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/479144 | ELIMINATING SUBSTRATE METAL CRACKS IN A BALL GRID ARRAY PACKAGE | Oct 1, 2023 | Pending |
Array
(
[id] => 18900561
[patent_doc_number] => 20240016046
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-01-11
[patent_title] => LIGHT-EMITTING DEVICE AND ELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/370927
[patent_app_country] => US
[patent_app_date] => 2023-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 22139
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18370927
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/370927 | Light-emitting device with circular polarizing plate over bonding layer | Sep 20, 2023 | Issued |
Array
(
[id] => 19767401
[patent_doc_number] => 12225717
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-02-11
[patent_title] => Semiconductor device with dielectric structure having enlargemant portion surrounding word line
[patent_app_type] => utility
[patent_app_number] => 18/470446
[patent_app_country] => US
[patent_app_date] => 2023-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 3952
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18470446
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/470446 | Semiconductor device with dielectric structure having enlargemant portion surrounding word line | Sep 19, 2023 | Issued |
Array
(
[id] => 20080832
[patent_doc_number] => 12354909
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-08
[patent_title] => Semiconductor device with porous spacer made of low-K material and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 18/470410
[patent_app_country] => US
[patent_app_date] => 2023-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 0
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18470410
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/470410 | Semiconductor device with porous spacer made of low-K material and manufacturing method thereof | Sep 18, 2023 | Issued |
Array
(
[id] => 20080832
[patent_doc_number] => 12354909
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-08
[patent_title] => Semiconductor device with porous spacer made of low-K material and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 18/470410
[patent_app_country] => US
[patent_app_date] => 2023-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 0
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18470410
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/470410 | Semiconductor device with porous spacer made of low-K material and manufacturing method thereof | Sep 18, 2023 | Issued |
Array
(
[id] => 19116453
[patent_doc_number] => 20240128203
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-18
[patent_title] => CHIP SIZE PACKAGE AND SYSTEM
[patent_app_type] => utility
[patent_app_number] => 18/369441
[patent_app_country] => US
[patent_app_date] => 2023-09-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3435
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18369441
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/369441 | CHIP SIZE PACKAGE AND SYSTEM | Sep 17, 2023 | Pending |
Array
(
[id] => 19239401
[patent_doc_number] => 20240196597
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-13
[patent_title] => MEMORY DEVICE HAVING ULTRA-LIGHTLY DOPED REGION AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/368669
[patent_app_country] => US
[patent_app_date] => 2023-09-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9877
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18368669
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/368669 | MEMORY DEVICE HAVING ULTRA-LIGHTLY DOPED REGION AND MANUFACTURING METHOD THEREOF | Sep 14, 2023 | Pending |
Array
(
[id] => 19239401
[patent_doc_number] => 20240196597
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-13
[patent_title] => MEMORY DEVICE HAVING ULTRA-LIGHTLY DOPED REGION AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/368669
[patent_app_country] => US
[patent_app_date] => 2023-09-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9877
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18368669
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/368669 | MEMORY DEVICE HAVING ULTRA-LIGHTLY DOPED REGION AND MANUFACTURING METHOD THEREOF | Sep 14, 2023 | Pending |
Array
(
[id] => 19038185
[patent_doc_number] => 20240088000
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-14
[patent_title] => FAN-OUT SYSTEM-LEVEL PACKAGING STRUCTURE AND PACKAGING METHOD
[patent_app_type] => utility
[patent_app_number] => 18/367478
[patent_app_country] => US
[patent_app_date] => 2023-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5302
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 221
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18367478
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/367478 | FAN-OUT SYSTEM-LEVEL PACKAGING STRUCTURE AND PACKAGING METHOD | Sep 12, 2023 | Pending |
Array
(
[id] => 19118362
[patent_doc_number] => 20240130112
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-18
[patent_title] => INTEGRATED CIRCUIT DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/464475
[patent_app_country] => US
[patent_app_date] => 2023-09-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7692
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18464475
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/464475 | INTEGRATED CIRCUIT DEVICE | Sep 10, 2023 | Pending |
Array
(
[id] => 19118362
[patent_doc_number] => 20240130112
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-18
[patent_title] => INTEGRATED CIRCUIT DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/464475
[patent_app_country] => US
[patent_app_date] => 2023-09-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7692
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18464475
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/464475 | INTEGRATED CIRCUIT DEVICE | Sep 10, 2023 | Pending |